COM20051I Datasheet, PDF (57/74 Pages) SMSC Corporation – Integrated Microcontroller and ARCNET (ANSI 878.1) Interface

3
BIT 0 OF
Y
TX_PEND
SET?
N
BIT 4 OF
TX_PEND
SET?
Y
*CCHEN CHECK TO
BE IMPLEMENTED
N
Y
BITS 5&6
SET?
N
EXIT
SET OFFSET =
#013H
CALL
SEND_TX_CMD
CLEAR BIT 0 OF
TX_PEND
Y
BIT 4 OF
N
TX_PEND
SET?
BIT 1 OF
Y
TX_PEND
SET?
N
BIT 2 OF
Y
TX_PEND
SET?
N
BIT 3 OF
Y
TX_PEND
SET?
N
EXIT
SAME PROCEDURE AS
FOR BIT 0 BUT WITH
OFFSET = 33H
SAME PROCEDURE AS
FOR BIT 0 BUT WITH
OFFSET = 1BH
SAME PROCEDURE AS
FOR BIT 0 BUT WITH
OFFSET = 3BH
EXIT
FIGURE 19 – TRANSMIT INTERRUPT SERVICE ROUTINE (continued)
SMSC DS – COM20051I
Page 57
Rev. 03/27/2000