EFR32FG12P432F Datasheet, PDF (89/183 Pages) Silicon Laboratories – EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet

EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet
Electrical Specifications
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Settling time, (output settled t_{IDAC_SETTLE}
within 1% of steady state val-
ue),
Range setting is changed
Step value is changed
—
5
—
μs
—
1
—
μs
Current consumption²
I_IDAC
EM0 or EM1 Source mode, ex-
—
11
18
μA
cluding output current, Across op-
erating temperature range
EM0 or EM1 Sink mode, exclud-
—
13
21
μA
ing output current, Across operat-
ing temperature range
EM2 or EM3 Source mode, ex-
—
0.023
—
μA
cluding output current, T = 25 °C
EM2 or EM3 Sink mode, exclud-
—
0.041
—
μA
ing output current, T = 25 °C
EM2 or EM3 Source mode, ex-
—
11
—
μA
cluding output current, T ≥ 85 °C
EM2 or EM3 Sink mode, exclud-
—
13
—
μA
ing output current, T ≥ 85 °C
Output voltage compliance in I_{COMP_SRC}
RANGESEL1=0, output voltage =
—
0.11
—
%
source mode, source current
min(V_IOVDD, V_AVDD2-100 mv)
change relative to current
sourced at 0 V
RANGESEL1=1, output voltage =
—
0.06
—
%
min(V_IOVDD, V_AVDD2-100 mV)
RANGESEL1=2, output voltage =
—
0.04
—
%
min(V_IOVDD, V_AVDD2-150 mV)
RANGESEL1=3, output voltage =
—
0.03
—
%
min(V_IOVDD, V_AVDD2-250 mV)
Output voltage compliance in I_{COMP_SINK}
RANGESEL1=0, output voltage =
—
0.12
—
%
sink mode, sink current
100 mV
change relative to current
sunk at IOVDD
RANGESEL1=1, output voltage =
—
0.05
—
%
100 mV
RANGESEL1=2, output voltage =
—
0.04
—
%
150 mV
RANGESEL1=3, output voltage =
—
0.03
—
%
250 mV
Note:
1. In IDAC_CURPROG register.
2. The IDAC is supplied by either AVDD, DVDD, or IOVDD based on the setting of ANASW in the EMU_PWRCTRL register and
PWRSEL in the IDAC_CTRL register. Setting PWRSEL to 1 selects IOVDD. With PWRSEL cleared to 0, ANASW selects be-
tween AVDD (0) and DVDD (1).
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