EFR32FG12P432F Datasheet, PDF (81/183 Pages) Silicon Laboratories – EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet

EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet
Electrical Specifications
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
ADC clock frequency
f_ADCCLK
—
—
16
MHz
Throughput rate
f_ADCRATE
—
—
1
Msps
Conversion time¹
t_ADCCONV
6 bit
8 bit
—
7
—
cycles
—
9
—
cycles
12 bit
—
13
—
cycles
Startup time of reference
t_ADCSTART
WARMUPMODE⁴ = NORMAL
—
—
generator and ADC core
WARMUPMODE⁴ = KEEPIN-
—
—
STANDBY
5
μs
2
μs
WARMUPMODE⁴ = KEEPINSLO-
—
—
WACC
1
μs
SNDR at 1Msps and f_IN =
SNDR_ADC
Internal reference⁶, differential
58
67
—
dB
10kHz
measurement
External reference⁵, differential
—
68
—
dB
measurement
Spurious-free dynamic range SFDR_ADC
1 MSamples/s, 10 kHz full-scale
—
75
—
dB
(SFDR)
sine wave
Differential non-linearity
DNL_ADC
12 bit resolution, No missing co-
-1
—
2
LSB
(DNL)
des
Integral non-linearity (INL), INL_ADC
End point method
12 bit resolution
-6
—
6
LSB
Offset error
V_ADCOFFSETERR
-3
0
3
LSB
Gain error in ADC
V_ADCGAIN
Using internal reference
Using external reference
—
-0.2
3.5
%
—
-1
—
%
Temperature sensor slope V_{TS_SLOPE}
—
-1.84
—
mV/°C
Note:
1. Derived from ADCCLK.
2. PSRR is referenced to AVDD when ANASW=0 and to DVDD when ANASW=1 in EMU_PWRCTRL.
3. In ADCn_BIASPROG register.
4. In ADCn_CNTL register.
5. External reference is 1.25 V applied externally to ADCnEXTREFP, with the selection CONF in the SINGLECTRL_REF or
SCANCTRL_REF register field and VREFP in the SINGLECTRLX_VREFSEL or SCANCTRLX_VREFSEL field. The differential
input range with this configuration is ± 1.25 V.
6. Internal reference option used corresponds to selection 2V5 in the SINGLECTRL_REF or SCANCTRL_REF register field. The
differential input range with this configuration is ± 1.25 V. Typical value is characterized using full-scale sine wave input. Minimum
value is production-tested using sine wave input at 1.5 dB lower than full scale.
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