EFR32FG12P432F Datasheet, PDF (128/183 Pages) Silicon Laboratories – EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet

EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet
Pin Definitions
Pin Name
Pins Description
Pin Name
Pins Description
RESETn
Reset input, active low. To apply an exter-
12
nal reset source to this pin, it is required to
only drive this pin low during reset, and let
the internal pull-up ensure that reset is re-
SUBGRF_OP
13
Sub GHz Differential RF output, positive
path.
leased.
SUBGRF_ON
14
Sub GHz Differential RF output, negative
path.
SUBGRF_IP
15
Sub GHz Differential RF input, positive
path.
SUBGRF_IN
16
Sub GHz Differential RF input, negative
path.
RFVSS
17 Radio Ground
PD9
18 GPIO (5V)
PD10
19 GPIO (5V)
PD11
20 GPIO (5V)
PD12
21 GPIO (5V)
PD13
22 GPIO
PD14
23 GPIO
PD15
24 GPIO
PA0
25 GPIO
PA1
26 GPIO
PA2
27 GPIO
PA3
28 GPIO
PA4
29 GPIO
PA5
30 GPIO (5V)
PB11
31 GPIO
PB12
32 GPIO
PB13
33 GPIO
AVDD
34 Analog power supply.
PB14
35 GPIO
PB15
36 GPIO
VREGVSS 37 Voltage regulator VSS
VREGSW 38 DCDC regulator switching node
VREGVDD 39 Voltage regulator VDD input
DVDD
40 Digital power supply.
DECOUPLE
Decouple output for on-chip voltage regu-
41 lator. An external decoupling capacitor is
required at this pin.
IOVDD
42 Digital IO power supply.
PC6
43 GPIO (5V)
PC7
44 GPIO (5V)
PC8
45 GPIO (5V)
PC9
46 GPIO (5V)
PC10
47 GPIO (5V)
PC11
48 GPIO (5V)
Note:
1. GPIO with 5V tolerance are indicated by (5V).
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