EFR32FG12P432F Datasheet, PDF (23/183 Pages) Silicon Laboratories – EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet

4.1.2.1 General Operating Conditions
EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet
Electrical Specifications
Table 4.2. General Operating Conditions
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Operating ambient tempera- T_A
ture range
-G temperature grade
-40
25
85
°C
AVDD supply voltage³
V_AVDD
1.8
3.3
3.8
V
VREGVDD operating supply V_VREGVDD
voltage^{3 1}
DCDC in regulation
DCDC in bypass 50mA load
2.4
3.3
3.8
V
1.8
3.3
3.8
V
DCDC not in use. DVDD external-
1.8
3.3
3.8
V
ly shorted to VREGVDD
VREGVDD current
I_VREGVDD
DCDC in bypass
—
—
200
mA
RFVDD operating supply
voltage
V_RFVDD
1.62
—
V_VREGVDD
V
DVDD operating supply volt- V_DVDD
age
1.62
—
V_VREGVDD
V
PAVDD operating supply
voltage
V_PAVDD
1.62
—
V_VREGVDD
V
IOVDD operating supply volt- V_IOVDD
age (All IOVDD pins)
1.62
—
V_VREGVDD
V
DECOUPLE output capaci- C_DECOUPLE
tor⁴
0.75
1.0
2.75
μF
Difference between AVDD dV_DD
and VREGVDD, ABS(AVDD-
VREGVDD)²
—
—
0.1
V
HFCORECLK frequency
f_CORE
VSCALE2, MODE = WS1
VSCALE0, MODE = WS0
—
—
40
MHz
—
—
20
MHz
HFCLK frequency
f_HFCLK
VSCALE2
VSCALE0
—
—
40
MHz
—
—
20
MHz
Note:
1. The minimum voltage required in bypass mode is calculated using R_BYP from the DCDC specification table. Requirements for
other loads can be calculated as V_{DVDD_min}+I_LOAD * R_{BYP_max}.
2. AVDD and VREGVDD pins should be physically shorted.
3. VREGVDD must be tied to AVDD. Both VREGVDD and AVDD minimum voltages must be satisfied for the part to operate. .
4. The system designer should consult the characteristic specs of the capacitor used on DECOUPLE to ensure its capacitance val-
ue stays within the specified bounds across temperature and DC bias.
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