EFR32FG12P432F Datasheet, PDF (26/183 Pages) Silicon Laboratories – EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet

EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet
Electrical Specifications
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Max load current
I_{LOAD_MAX}
Low noise (LN) mode, Heavy
Drive²
—
—
200
mA
Low noise (LN) mode, Medium
—
Drive²
—
100
mA
Low noise (LN) mode, Light
Drive²
—
—
50
mA
Low power (LP) mode,
LPCMPBIASEMxx³ = 0
—
—
75
μA
Low power (LP) mode,
LPCMPBIASEMxx³ = 3
—
—
10
mA
DCDC nominal output ca-
pacitor⁵
C_DCDC
25% tolerance
1
4.7
4.7
μF
DCDC nominal output induc- L_DCDC
tor
20% tolerance
4.7
4.7
4.7
μH
Resistance in Bypass mode R_BYP
—
1.2
2.5
Ω
Note:
1. Due to internal dropout, the DC-DC output will never be able to reach its input voltage, V_VREGVDD.
2. Drive levels are defined by configuration of the PFETCNT and NFETCNT registers. Light Drive: PFETCNT=NFETCNT=3; Medi-
um Drive: PFETCNT=NFETCNT=7; Heavy Drive: PFETCNT=NFETCNT=15.
3. LPCMPBIASEMxx refers to either LPCMPBIASEM234H in the EMU_DCDCMISCCTRL register or LPCMPBIASEM01 in the
EMU_DCDCLOEM01CFG register, depending on the energy mode.
4. LP mode controller is a hysteretic controller that maintains the output voltage withinthe specified limits.
5. Output voltage under/over-shoot and regulation are specified with C_DCDC 4.7 μF. Different control loop settings must be used if
C_DCDC is lower than 4.7 μF.
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