EFR32FG12P432F Datasheet, PDF (163/183 Pages) Silicon Laboratories – EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet

EFR32FG12 Flex Gecko Proprietary Protocol SoC Family Data Sheet
Pin Definitions
6.9 Analog Port (APORT) Client Maps
The Analog Port (APORT) is an infrastructure used to connect chip pins with on-chip analog clients such as analog comparators, ADCs,
DACs, etc. The APORT consists of a set of shared buses, switches, and control logic needed to configurably implement the signal rout-
ing. Figure 6.7 APORT Connection Diagram on page 158 Shows the APORT routing for this device family. A complete description of
APORT functionality can be found in the Reference Manual.
ACMP1X
ACMP1Y
PF0
PF1
PF2
PF3
PF8
PF9
PF10
PF11
PF12
PF13
PF14
PF15
PK0
PK1
PK2
PF4
PF5
PF6
PF7
0X
1X
POS ^2X
3X
4X
ACMP1
0Y
1Y
NEG 2Y
3Y
4Y
0X
1X
POS ^2X
3X
4X
ADC0
0Y
1Y
NEG _2Y
3Y
4Y
EXTP
EXTN
POS
OPA0_P
1X
2X
3X
4X
OPA0
NEG
OPA0_N
1Y
2Y
3Y
4Y
OUT
OUT0
OUT0ALT
OUT1
OUT2
OUT3
OUT4
POS
OPA2_P
1X
2X
3X
4X
OPA2
NEG
OPA2_N
1Y
2Y
3Y
4Y
OUT
OUT2
OUT2ALT
OUT1
OUT2
OUT3
OUT4
nX, nY
APORTnX, APORTnY
AX, BY, … BUSAX, BUSBY, ...
ADC0X,
ADC0Y
ACMP0X,
ACMP1Y, …
BUSADC0X,
BUSADC0Y
BUSACMP0X,
BUSACMP1Y, ...
1X
CEXT
1Y
3X
3Y
CSEN
2X
CEXT_SENSE ^2Y
4X
4Y
0X
1X
2X _POS
3X
4X
ACMP0
0Y
1Y
2Y ^NEG
3Y
4Y
1X
IDAC0
1Y
OPA2_N
OUT2
OPA2_P
OUT2ALT
OUT2ALT
OPA1_P
1X
2X
3X
4X
POS
OPA1_N
1Y
2Y
3Y
4Y
NEG
OPA1
OUT1
OUT1ALT
OUT1
OUT2
OUT3
OUT4
OUT
OUT0ALT
OUT1ALT
OPA0_N
OUT0
OUT1ALT
OPA0_P
ADC_EXTP
ADC_EXTN
OUT0ALT
OPA1N
VDAC0_OPA2ALT
VDAC0_OPA2ALT
VDAC0_OUT0ALT
VDAC0_OUT1ALT
OPA0_INN0
OPA0_OUT
VDAC0_OUT1ALT
OPA0_INP0
ADC0_EXTP
ADC0_EXTN
OPA0ALT
OPA1_INN0
PB15
PB14
PB13
PB12
PB11
PB10
PB9
PB8
PB7
PB6
PI3
PI2
PI1
PI0
PA9
PA8
PA7 LESENSE
PA6 LESENSE
PA5 LESENSE
PA4 LESENSE
PA3 LESENSE
PA2 LESENSE
PA1 LESENSE
PA0 LESENSE
PD15 LESENSE
Figure 6.7. APORT Connection Diagram
Client maps for each analog circuit using the APORT are shown in the following tables. The maps are organized by bus, and show the
peripheral's port connection, the shared bus, and the connection from specific bus channel numbers to GPIO pins.
In general, enumerations for the pin selection field in an analog peripheral's register can be determined by finding the desired pin con-
nection in the table and then combining the value in the Port column (APORT__), and the channel identifier (CH__). For example, if pin
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