C8051F85X86X Datasheet, PDF (82/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
Table 14.3. ADC0 Optimal Power Configuration (12-bit Mode)
Required
Throughput
Reference Source Mode Configuration SAR Clock Speed Other Register Field
Settings
180-200 ksps
Any
Always-On +
Burst Mode
(ADEN = 1
ADBMEN = 1)
12.25 MHz
(ADSC = 1)
ADC0PWR = 0x40
ADC0TK = 0xBF
ADRPT = 1
125-180 ksps
Any
Always-On +
Burst Mode
(ADEN = 1
ADBMEN = 1)
12.25 MHz
(ADSC = 1)
ADC0PWR = 0x40
ADC0TK = 0x3A
ADRPT = 1
0-125 ksps
External
Burst Mode
(ADEN = 0
ADBMEN = 1)
12.25 MHz
(ADSC = 1)
ADC0PWR = 0x44
ADC0TK = 0x3A
ADRPT = 1
50-125 ksps
Internal
Burst Mode
(ADEN = 0
ADBMEN = 1)
12.25 MHz
(ADSC = 1)
ADC0PWR = 0x44
ADC0TK = 0x3A
ADRPT = 1
0-50 ksps
Internal
Burst Mode
(ADEN = 0
ADBMEN = 1)
4.08 MHz
(ADSC = 5)
ADC0PWR = 0xF4
ADC0TK = 0x34
ADRPT = 1
Notes:
1. ADRPT reflects the minimum setting for this bit field. When using the ADC in Burst Mode, up to 64 samples may be
auto-accumulated per conversion trigger by adjusting ADRPT.
For applications where burst mode is used to automatically accumulate multiple results, additional supply current
savings can be realized. The length of time the ADC is active during each burst contains power-up time at the
beginning of the burst as well as the conversion time required for each conversion in the burst. The power-on time
is only required at the beginning of each burst. When compared with single-sample bursts to collect the same
number of conversions, multi-sample bursts will consume significantly less power. For example, performing an
eight-cycle burst of 10-bt conversions consumes about 61% of the power required to perform those same eight
samples in single-cycle bursts. For 12-bit conversions, an eight-cycle burst results in about 85% of the equivalent
single-cycle bursts. Figure 14.5 shows this relationship for the different burst cycle lengths.
See the Electrical Characteristics chapter for details on power consumption and the maximum clock frequencies
allowed in each mode.
Preliminary Rev 0.6
85