C8051F85X86X Datasheet, PDF (142/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
20.1. PCA Counter/Timer
The 16-bit PCA counter/timer consists of two 8-bit SFRs: PCA0L and PCA0H. PCA0H is the high byte of the 16-bit
counter/timer and PCA0L is the low byte. Reading PCA0L automatically latches the value of PCA0H into a
“snapshot” register; the following PCA0H read accesses this “snapshot” register. Reading the PCA0L Register
first guarantees an accurate reading of the entire 16-bit PCA0 counter. Reading PCA0H or PCA0L does not
disturb the counter operation. The CPS2–CPS0 bits in the PCA0MD register select the timebase for the counter/
timer as shown in Table 20.1.
When the counter/timer overflows from 0xFFFF to 0x0000, the Counter Overflow Flag (CF) in PCA0MD is set to
logic 1 and an interrupt request is generated if CF interrupts are enabled. Setting the ECF bit in PCA0MD to logic 1
enables the CF flag to generate an interrupt request. The CF bit is not automatically cleared by hardware when the
CPU vectors to the interrupt service routine, and must be cleared by software. Clearing the CIDL bit in the
PCA0MD register allows the PCA to continue normal operation while the CPU is in Idle mode.
Table 20.1. PCA Timebase Input Options
CPS2 CPS1 CPS0 Timebase
0
0
0 System clock divided by 12
0
0
1 System clock divided by 4
0
1
0 Timer 0 overflow
0
1
1 High-to-low transitions on ECI (max rate = system clock divided by 4)^*
1
0
0 System clock
1
0
1 External oscillator source divided by 8^*
1
1
0 Low frequency oscillator divided by 8^*
1
1
1 Reserved
Note: Synchronized with the system clock.
20.2. PCA0 Interrupt Sources
The PCA0 module shares one interrupt vector among all of its modules. There are are several event flags that can
be used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set upon a 16-
bit overflow of the PCA0 counter, an intermediate overflow flag (COVF), which can be set on an overflow from the
8th - 11th bit of the PCA0 counter, and the individual flags for each PCA channel (CCFn), which are set according
to the operation mode of that module. These event flags are always set when the trigger condition occurs. Each of
these flags can be individually selected to generate a PCA0 interrupt, using the corresponding interrupt enable flag
(ECF for CF, ECOV for COVF, and ECCFn for each CCFn). PCA0 interrupts must be globally enabled before any
individual interrupt sources are recognized by the processor. PCA0 interrupts are globally enabled by setting the
EA bit and the EPCA0 bit to logic 1.
Preliminary Rev 0.6
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