C8051F85X86X Datasheet, PDF (75/290 Pages) Silicon Laboratories – Low-Cost 8-bit MCU Family with up to 8 kB of Flash

C8051F85x/86x
14. Analog-to-Digital Converter (ADC0)
The ADC is a successive-approximation-register (SAR) ADC with 12, 10, and 8-bit modes, integrated track-and-
hold and a programmable window detector. These different modes allow the user to trade off speed for resolution.
ADC0 also has an autonomous low power burst mode which can automatically enable ADC0, capture and
accumulate samples, then place ADC0 in a low power shutdown mode without CPU intervention. It also has a 16-
bit accumulator that can automatically oversample and average the ADC results.
The ADC is fully configurable under software control via several registers. The ADC0 operates in single-ended
mode and may be configured to measure different signals using the analog multiplexer. The voltage reference for
the ADC is selectable between internal and external reference sources.
P0 Pins (8)
P1 Pins (8)
VDD
GND
Internal LDO
Internal LDO
VDD
VREF
Device Ground
AGND
SYSCLK
Input
Selection
0.5x – 1x
gain
Temp
Sensor
1.65 V /
2.4 V
Reference
Reference
Selection
ADC0
Control /
Configuration
SAR Analog to
Digital Converter
Less
Than
Greater
Than
Window Compare
Accumulator
ADWINT
(Window Interrupt)
ADC0
ADINT
(Interrupt Flag)
Trigger
Selection
ADBUSY (On Demand)
Timer 0 Overflow
Timer 2 Overflow
Timer 3 Overflow
CNVSTR (External Pin)
Clock
Divider
SAR clock
Figure 14.1. ADC0 Functional Block Diagram
78
Preliminary Rev 0.6