SI53315 Datasheet, PDF(8/30 Page) Silicon Laboratories – 1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL

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SI53315 Datasheet, PDF (8/30 Pages) Silicon Laboratories – 1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL

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Si53315

Table 9. AC Characteristics (Continued)

(VDD = 1.8 V ï±ï 5%, 2.5 V ï± 5%, or 3.3 V ï±ï 10%,TA = â40 to 85 ï°C)

Parameter

Output to Output

Skew

Symbol

TSK

Part to Part Skew3

Power Supply Noise

Rejection4

TPS

PSRR

Test Condition

Identical Configuration,

Single-ended (QN to QM)

Identical Configuration,

Differential (QN to QM)

Identical configuration

10 kHz sinusoidal noise

100 kHz sinusoidal noise

Min

Typ

Max

Unit

100

â90

dBc

â90

dBc

500 kHz sinusoidal noise

â80

dBc

1 MHz sinusoidal noise

â70

dBc

Notes:

1. For clock division applications, a minimum input clock slew rate of 30 mV/ns is required.

2. See Figure 4.

3. Defined as skew between outputs on different devices operating at the same supply voltages, temperatures, and equal

load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.

4. Measured for 156.25 MHz carrier frequency. Sine-wave noise added to VDDOX (1.8 V = 50 mVPP,

2.5/3.3 V = 100 mVPP) and noise spur amplitude measured. See AN491 for further details.

Preliminary Rev. 0.4

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