SI5315 Datasheet, PDF (53/54 Pages) Silicon Laboratories – Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet

DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.2
 Expanded/added numerous operating sections to
initial data sheet
Revision 0.2 to Revision 0.25
 Updated features and application list
 Updated Section 1. "Electrical Specifications”
 Added voltage regulator block to Figure 7
 Revised footnotes in Table 9
 Removed plan #203 from Table 9
 Removed Figure 17. Crystal Oscillator with
Feedback Resistor diagram from Section 7.
"Crystal/Reference Clock Input”
 Added XA/XB jitter transfer plot to Section 7.
"Crystal/Reference Clock Input”
 Added PSRR transfer function plot to Section 8.
"Power Supply Filtering”
 Updated Typical phase noise plot and RMS jitter
table in Section 9. "Typical Phase Noise Plots”
Revision 0.25 to Revision 0.26
 Corrected Section 11. "Ordering Guide” Output
Clock Frequency Range for Si5315B-C-GM to
8 kHz–125 MHz.
Revision 0.26 to Revision 1.0
 Updated Table 2 on page 4.
 Updated Table 3 on page 8.
 Updated Table 7 on page 13.
 Moved “Typical Application Circuit” to page 14.
 Added reference to AN591.
 Bypass mode not supported with CMOS outputs.
 Changed G.8262 compliance language.
 Added frequency plans 103, 129, and 130.
Si5315
Rev. 1.0
53