SI5315 Datasheet, PDF (13/54 Pages) Silicon Laboratories – Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet

Si5315
Table 7. Thermal Characteristics
(V_DD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, T_A = –40 to 85 ºC)
Parameter
Symbol
Test Condition
Thermal Resistance
_JA
Junction to Ambient
Thermal Resistance
_JC
Junction to Case
Still Air
Still Air
Min
Typ
Max Unit
—
32
—
ºC/W
—
14
—
ºC/W
Table 8. Absolute Maximum Limits
Parameter
Symbol
Value
Unit
DC Supply Voltage
LVCMOS Input Voltage
CKINn Voltage Level Limits
XA/XB Voltage Level Limits
Operating Junction Temperature
Storage Temperature Range
ESD HBM Tolerance (100 pF, 1.5 kΩ); All pins except
CKIN+/CKIN–
V_DD
–0.5 to 3.8
V
V_DIG
–0.3 to (V_DD + 0.3)
V
CKN_VIN
0 to V_DD
V
XA_VIN
0 to 1.2
V
T_JCT
–55 to 150
C
T_STG
–55 to 150
C
2
kV
ESD MM Tolerance; All pins except CKIN+/CKIN–
ESD HBM Tolerance (100 pF, 1.5 kΩ); CKIN+/CKIN–
150
V
750
V
ESD MM Tolerance; CKIN+/CKIN–
100
V
Latch-Up Tolerance
JESD78 Compliant
Note: Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as specified in the operation sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods of time may affect device reliability.
Rev. 1.0
13