ISL6398 Datasheet, PDF (51/57 Pages) Intersil Corporation – Programmable soft-start rate and DVID rate

ISL6398
sense element, either the DCR of the inductor or R_SENSE
depending on the sensing method, and I_OCP is the desired
overcurrent trip point. Typically, I_OCP can be chosen to be 1.2
times the maximum load current of the specific application.
With integrated temperature compensation, the sensed current
signal is independent of the operational temperature of the
power stage, i.e. the temperature effect on the current sense
element R_X is cancelled by the integrated temperature
compensation function. R_X in Equation 42 should be the
resistance of the current sense element at the room
temperature.
When the integrated temperature compensation function is
disabled by selecting “OFF” TCOMP code, the sensed current will
be dependent on the operational temperature of the power
stage, since the DC resistance of the current sense element may
be changed according to the operational temperature. R_X in
Equation 42 should be the maximum DC resistance of the
current sense element at the all operational temperature.
In certain circumstances, especially for a design with an
unsymmetrical layout, it may be necessary to adjust the value of
one or more ISEN resistors for VR. When the components of one
or more channels are inhibited from effectively dissipating their
heat so that the affected channels run cooler than the average,
choose new, larger values of R_ISEN for the affected phases (see
the section entitled “Current Sensing” on page 18). Choose
R_ISEN,2 in proportion to the desired increase in temperature rise
in order to cause proportionally more current to flow in the cooler
phase, as shown in Equation 43:
R_ISEN,2 = R_ISEN ^-----TT----²¹-
(EQ. 43)
R_ISEN = R_ISEN,2 – R_ISEN
In Equation 43, make sure that T₂ is the desired temperature rise
above the ambient temperature, and T₁ is the measured
temperature rise above the ambient temperature. Since all
channels’ R_ISEN are integrated and set by one RSET, a resistor
(R_ISEN) can be in series with the cooler channel’s ISEN+ pin to
raise this phase current. However, the ISL6398 can adjust the
thermal/current balance of the VR via registers F7 to FC.
Load-line Regulation Resistor
The load-line regulation resistor is labelled R_FB in Figure 11. Its
value depends on the desired loadline requirement of the
application.
The desired loadline can be calculated using Equation 44:
R_LL = ^V-----D----I^R--_F--^O-_L----^O----^P--
(EQ. 44)
where I_FL is the full load current of the specific application, and
VR_DROOP is the desired voltage droop under the full load
condition.
Based on the desired loadline R_LL, the loadline regulation
resistor can be calculated using Equation 45:
R_FB = ^{N------}---R-----^I--^S--R--^E--_X--^N-----^---R----^L----^L-
(EQ. 45)
where N is the active channel number, R_ISEN is the sense resistor
connected to the ISEN+ pin, and R_X is the resistance of the
current sense element, either the DCR of the inductor or R_SEN
depending on the sensing method.
If one or more of the current sense resistors are adjusted for
thermal balance (as in Equation 43), the load-line regulation
resistor should be selected based on the average value of the
current sensing resistors, as given in Equation 46:
 ^R_FB ^{= R--R---L-}_X^--L--
R_{ISENn}
n
(EQ. 46)
where R_ISEN(n) is the current sensing resistor connected to the
n^th ISEN+ pin.
Output Filter Design
The output inductors and the output capacitor bank together to
form a low-pass filter responsible for smoothing the pulsating
voltage at the phase nodes. The output filter also must provide
the transient energy until the regulator can respond. Because it
has a low bandwidth compared to the switching frequency, the
output filter necessarily limits the system transient response. The
output capacitor must supply or sink load current while the
current in the output inductors increases or decreases to meet
the demand.
In high-speed converters, the output capacitor bank is usually the
most costly (and often the largest) part of the circuit. Output filter
design begins with minimizing the cost of this part of the circuit.
The critical load parameters in choosing the output capacitors are
the maximum size of the load step, DI; the load-current slew rate,
di/dt; and the maximum allowable output-voltage deviation under
transient loading, DV_MAX. Capacitors are characterized according
to their capacitance, ESR, and ESL (equivalent series inductance).
At the beginning of the load transient, the output capacitors supply
all of the transient current. The output voltage will initially deviate by
an amount approximated by the voltage drop across the ESL. As the
load current increases, the voltage drop across the ESR increases
linearly until the load current reaches its final value. The capacitors
selected must have sufficiently low ESL and ESR so that the total
output-voltage deviation is less than the allowable maximum.
Neglecting the contribution of inductor current and regulator
response, the output voltage initially deviates by an amount, as
shown in Equation 47:
V  ESL _d-d---ti + ESR I
(EQ. 47)
The filter capacitor must have sufficiently low ESL and ESR so
that V < V_MAX.
Most capacitor solutions rely on a mixture of high-frequency
capacitors with relatively low capacitance in combination with
bulk capacitors having high capacitance but limited high
frequency performance. Minimizing the ESL of the high
frequency capacitors allows them to support the output voltage
as the current increases. Minimizing the ESR of the bulk
capacitors allows them to supply the increased current with less
output voltage deviation.
The ESR of the bulk capacitors also creates the majority of the
output-voltage ripple. As the bulk capacitors sink and source the
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August 13, 2015