ISL6398 Datasheet, PDF (17/57 Pages) Intersil Corporation – Programmable soft-start rate and DVID rate

ISL6398
With EAPP control and feed-forward function, the ISL6398 can
achieve excellent transient performance over wide frequency
range of load step, resulting in lower demand on the output
capacitors.
Under steady state conditions, the operation of the ISL6398
PWM modulator is similar to a conventional trailing edge
modulator. Conventional analysis and design methods can
therefore be used for steady state and small signal analysis.
PWM Operation
The timing of each channel is set by the number of active
channels. The default channel setting for the ISL6398 is six. The
switching cycle is defined as the time between PWM pulse
termination signals of each channel. The cycle time of the pulse
signal is the inverse of the switching frequency. The PWM signals
command the MOSFET driver to turn on/off the channel
MOSFETs.
The ISL6398 can work in a 0 to 6-Phase configuration. Tie
PWM(N+1) to VCC to configure for N-phase operation. PWM firing
order is sequential from 1 to N with N being the number of active
phases, as summarized in Table 1. For 6-phase operation, the
channel firing sequence is 1-2-3-4-5-6, and they are evenly
spaced over 1/6 of a cycle. Connecting PWM6 to V_CC configures
5-phase operation, the channel firing order is 1-2-3-4-5 and the
phase spacing is 1/5 of a cycle. If PWM2 is connected to V_CC,
only Channel 1 operation is selected. If PWM1 is connected to
V_CC, the VR operation is turned off.
TABLE 1. PHASE NUMBER AND PWM FIRING SEQUENCE
N
PHASE SEQUENCE
5
1-2-3-4-5
4
1-2-3-4
3
1-2-3
2
1-2
1
1
0
OFF
PWM# TIED
TO V_CC
None
PWM5
PWM4
PWM3
PWM2
PWM1
ACTIVE PHASE
AT 0A LOAD
PWM1/3
PWM1/3
PWM1/2
PWM1/2
PWM1
OFF
The controller starts phase shedding the next switching cycle. The
controller reduces the number of active phases according to the
logic state on Table 2. “NPSI” register and AUTO pin program the
controller in operation of standard (SI), 2-phase coupled, or
(N-x)-phase coupled inductors. Different cases yield different PWM
output behaviors on both dropped phase(s) and operational
phase(s) as load changes. When APA is triggered, it pulls the
controller back to full phase operation to sustain an immediate
heavy transient load. Note that “N-x” means N-x phase(s) coupled
and x phase(s) are uncoupled.
For 2-Phase coupled inductor (CI) operation, both coupled phases
should be 180° out-of-phase. In low power conditions, it drops to
2-phase and the opposite phase of the operational phase turns
on its low-side MOSFET to circulate inductor current to minimize
conduction loss when Phase 1 is high.
In low power condition, VR is in single-phase CCM operation with
PWM1, or 2-phase CCM operation with PWM1 and 2, 3 or 4, as
shown in Table 1. The number of operational phases is
configured by “NPSI” register, shown in Table 2.
TABLE 2. PHASE DROPPING CONFIGURATION AT LOW POWER
NPSI
D2[1:0]
CODE
AUTO MINIMUM
PHASE COUNT
0h
SI1
SI, (N-1)-CI
1-Phase
1h
SI2
SI, (N-2)-CI
2-Phase
2h
CI1
2-Phase CI
1-Phase
3h
CI2
2-Phase CI
2-Phase
NOTE: For 2-Phase CI option, the dropped coupled phase turns on LGATE
to circulate current when PWM1 is high. Programmable via PMBus.
While the controller is operational (V_CC above POR, TM_EN_OTP
and EN_PWR_CFP are both high, valid VID inputs), it can pull the
PWM pins to ~40% of V_CC (~2V for 5V V_CC bias, for 5V PWM) or
~28% of V_CC (for 3.3V PWM) during various stages, such as
soft-start delay, phase shedding operation, or fault conditions
(OC or OV events). The matching driver's internal PWM resistor
divider can further raise the PWM potential, but not lower it
below the level set by the controller IC. Therefore, the controller's
PWM outputs are designed to be compatible with DrMOS and
Intersil drivers that require 3.3V and 5V PWM signal amplitudes,
programmed by PMBus.
DrMOS and Driver Compatibility
In operational mode, the ISL6398 can actively drive PWM into
tri-state level (mid level), which can be programmed to be
compatible with 3.3V or 5V PWM input DrMOS or Drivers. The
ISL6398’s PWM “LOW” level is 0V and PWM “HIGH” level is V_CC (5V).
The PWM “HIGH” minimum threshold of the DrMOS should be
higher than 33% of V_CC for 3.3V PWM logic and 44% of V_CC for 5V
PWM logic, while the PWM “LOW” maximum threshold of the
DrMOS should be lower than 26% of V_CC for 3.3V PWM logic and
36% of V_CC for 5V PWM logic. Since most of industrial DrMOS
devices are not compatible with Intersil’s PWM protocol for diode
emulation, therefore, the diode emulation mode should be disabled
in both controller and DrMOS. Coupling with the ISL6627, zero
current shutdown can be achieved, which minimizes the power
stage stress.
Phase Doubler Compatibility
The ISL6398 is compatible with phase doublers (ISL6611A and
ISL6617), which can double or quadruple the phase count. For
instance, the multi-phase PWM can realize up to 24-phase count
system. A higher phase count system can improve thermal
distribution and power conversion efficiency at heavy load.
Non-Intersil Phase doubler typically does not have current balance
and is not compatible with Intersil’s multi-phase controllers.
Precharged Start-up Capability
Since the ISL6398 uses 5V bias and the high efficiency power train
mostly uses 5V driver, this makes the ISL6398 digital power system
much more robust and reliable for power-up and down as well as
precharged start-up, which is typically hardly managed for a system
that deals with 3.3V, 5V, and 12V supplies.
Switching Frequency
The VR’s switching frequency is programmable from 120kHz to
2.025MHz via PMBus. It is 15kHz/step with a slew rate of
step/20µs.
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FN8575.1
August 13, 2015