ISL6398 Datasheet, PDF (16/57 Pages) Intersil Corporation – Programmable soft-start rate and DVID rate

ISL6398
In the case of multiphase converters, the capacitor current is the
sum of the ripple currents from each of the individual channels.
Compare Equation 1 to the expression for the peak-to-peak
current after the summation of N symmetrically phase-shifted
inductor currents in Equation 2, the peak-to-peak overall ripple
current I_C(P-P) decreases with the increase in the number of
channels, as shown in Figure 2.
N=1
2
3
4
5
6
DUTY CYCLE (V_OUT/V_IN)
FIGURE 2. RIPPLE CURRENT MULTIPLIER VS. DUTY CYCLE
Output voltage ripple is a function of capacitance, capacitor
Equivalent Series Resistance (ESR), and the summed inductor
ripple current. Increased ripple frequency and lower ripple
amplitude means that the designer can use less per-channel
inductance and few or less costly output capacitors for any
performance specification.
I_{cp – p}= _L---^V--_--^O-_F---^U-_S----^TW--- K_RCM
K_RCM = -^--^N------^---^D------–----^m-------+---_N-¹----^-_---^_D---^--^m-------–----^---^N-----^---^D-----^---^
(EQ. 2)
for
m–1NDm
m = ROUNDUPN  D 0
Another benefit of interleaving is to reduce input ripple current.
Input capacitance is determined in part by the maximum input
ripple current. Multiphase topologies can improve overall system
cost and size by lowering input ripple current and allowing the
designer to reduce the cost of input capacitors. The example in
Figure 3 illustrates input currents from a three-phase converter
combining to reduce the total input ripple current.
INPUT-CAPACITOR CURRENT, 10A/DIV
CHANNEL 1
INPUT CURRENT
10A/DIV
CHANNEL 2
INPUT CURRENT
10A/DIV
CHANNEL 3
INPUT CURRENT
10A/DIV
1µs/DIV
FIGURE 3. CHANNEL INPUT CURRENTS AND INPUT-CAPACITOR
RMS CURRENT FOR 3-PHASE CONVERTER
The converter depicted in Figure 3 delivers 36A to a 1.5V load from
a 12V input. The RMS input capacitor current is 5.9A. Compare this
to a single-phase converter also stepping down 12V to 1.5V at 36A.
The single-phase converter has 11.9A_RMS input capacitor current.
The single-phase converter must use an input capacitor bank with
twice the RMS current capacity as the equivalent three-phase
converter.
Figures 37, 38 and 39, as described in “Input Capacitor
Selection” on page 52, can be used to determine the input
capacitor RMS current based on load current, duty cycle, and the
number of channels. They are provided as aids in determining
the optimal input capacitor solution. Figure 40 shows the single
phase input-capacitor RMS current for comparison.
PWM Modulation Scheme
The ISL6398 adopts Intersil's proprietary Enhanced Active Pulse
Positioning (EAPP) modulation scheme to improve transient
performance. The EAPP is a unique dual-edge PWM modulation
scheme with both PWM leading and trailing edges being
independently moved to give the best response to transient
loads. The EAPP has an inherited function, similar to Intersil's
proprietary Adaptive Phase Alignment (APA) technique, to turn
on all phases together to further improve the transient response,
when there are sufficiently large load step currents. The EAPP is
a variable frequency architecture, providing linear control over
transient events and evenly distributing the pulses among all
phases to achieve very good current balance and eliminate beat
frequency oscillation over a wide range of load transient
frequencies.
To further improve the line and load transient responses, the
multi-phase PWM features feed-forward function to change the
up ramp with the input line (voltage on ISENIN+ pin) to maintain
a constant overall loop gain over a wide range input voltage. The
up ramp of the internal sawtooth is defined in Equation 3.
V_RAMP = ^V-----^I--^N-----^---^V----₁^R---₂-^A---_V-^M-----^P----^_---^A---^D----^J-
(EQ. 3)
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August 13, 2015