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| HYB5116405BJ-50- Datasheet, PDF (22/28 Pages) Siemens Semiconductor Group – 4M x 4-Bit Dynamic RAM 2k & 4k Refresh | |||
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HYB 5116(7)405BJ-50/-60
HYB 3116(7)405BJ/BT(L)-50/-60
4M Ã 4 EDO-DRAM
t RC
RAS
CAS
Address
t RAS
VIH
VIL
t RCD
t RSH
VIH
VIL
t ASR
t RAD
t ASC
t RAH
VIH
Row
VIL
t RCS
t CAH
Column
VIH
WE
VIL
VIH
OE
VIL
t AA
t OEA
t DZC
I/O
VIH
(Inputs) VIL
t DZO
t CAC
t CLZ
t RAC
I/O
VOH
(Outputs) VOL
t RC
t RP
t RP
t RAS
t CHR
t CRP
t WRP
t WRH
t RRH
t ASR
Row
t CDD
t ODD
Valid Data OUT
t OFF
t OEZ
Hi Z
"H" or "L"
SPT03034
Hidden Refresh Cycle (Read) Cycle
Semiconductor Group
22
1998-10-01
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