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| HYB5116405BJ-50- Datasheet, PDF (18/28 Pages) Siemens Semiconductor Group – 4M x 4-Bit Dynamic RAM 2k & 4k Refresh | |||
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HYB 5116(7)405BJ-50/-60
HYB 3116(7)405BJ/BT(L)-50/-60
4M Ã 4 EDO-DRAM
t RCD
VIH
RAS
VIL
t RAS
t RHCP
t HPC
t RP
t CRP
t CP
t CAS
t CAS
t RSH
t CAS
t CRP
VIH
CAS
VIL
t CSH
t RAL
t ASR
t RAH
t CAH
t ASC
t CAH
t CAH
t ASC
t ASC
VIH
Address
VIL
Row
Address
Column 1
t RAD
t WCS
t CWL
Column 2
t WCS
t CWL
Column N
t WCS
t RWL
t CWL
VIH
WE
VIL
t WCH
t WP
t WCH
t WP
t WCH
t WP
VIH
OE
VIL
I/O
VIH
(Input) VIL
t DH
t DS
Data IN 1
t DH
t DS
Data IN 2
t DH
t DS
Data IN N
"H" or "L"
SPT03039
Hyper Page Mode (EDO) Early Write Cycle
Semiconductor Group
18
1998-10-01
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