HYB5116405BJ-50- Datasheet, PDF (1/28 Pages) Siemens Semiconductor Group – 4M x 4-Bit Dynamic RAM 2k & 4k Refresh

4M × 4-Bit Dynamic RAM
2k & 4k Refresh
(Hyper Page Mode - EDO)
Advanced Information
• 4 194 304 words by 4-bit organization
• 0 to 70 °C operating temperature
• Hyper Page Mode - EDO - operation
• Performance:
t_RAC RAS access time
t_CAC CAS access time
t_AA Access time from address
t_RC Read/Write cycle time
t_HPC Hyper page mode (EDO) cycle time
HYB 5116405BJ-50/-60
HYB 5117405BJ-50/-60
HYB 3116405BJ/BT(L)-50/-60
HYB 3117405BJ/BT-50/-60
-50 -60
50 60 ns
13 15 ns
25 30 ns
84 104 ns
20 25 ns
• Power dissipation, refresh & addressing:
HYB 5116405 HYB 3116405 HYB 5117405 HYB 3117405
-50 -60 -50 -60 -50 -60 -50 -60
Power supply
5 V ± 10% 3.3 V ± 0.3 V 5 V ± 10% 3.3 V ± 0.3 V
Addressing
12/10
12/10
11/11
11/11
Refresh
4096 cylces / 64 ms
2048 cycles / 32 ms
L-version
4096 cycles / 128 ms
–
Active
275 220 180 144 440 385 288 252 mW
TTL Standby
11
7.2
11
7.2
mW
CMOS Standby
5.5
3.6
5.5
3.6
mW
CMOS Standby
–
0.72
–
(L-version)
–
mW
• Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh,
test mode and Self Refresh (on L-versions only)
• All inputs, outputs and clocks fully TTL (5 V versions) and LV-TTL (3.3 V version)-compatible
• Plastic Package:
P-SOJ-26/24-1 300 mil
P-TSOPII-26/24-1 300 mil
Semiconductor Group
1
1998-10-01