HYB5116400BJ-50-60 Datasheet, PDF (18/26 Pages) Siemens Semiconductor Group – 4M x 4-Bit Dynamic RAM 2k & 4k Refresh

HYB 5116(7)400BJ-50/-60
HYB 3116(7)400BJ/BT-50/-60
4M × 4 DRAM
V_IH
RAS
V_IL
V_IH
CAS
V_IL
t _ASR
V_IH
Address
V_IL
V_IH
WE
V_IL
V_IH
OE
V_IL
I/O
V_IH
(Inputs) _VIL
t _RAS
t _CSH
t _CP
t _PRWC
t _RCD
t _CAS
t _CAS
t _RSH
t _CAS
t _RAD
t _RAH
t _ASC
t _CAH
Row
Column
t _RWD
t _RCS
t _CWD
t _CWL
t _ASC
t _CAH
Column
t _CPWD
t _CWD
t _CWL
t _RAL
t _CAH
t_ASC
Column
t _CPWD
t _CWD
t _RWL
t _CWL
t _AWD
t _AA
t _OEA
t _WP
t _OEH
t _AWD
t _OEA
t _WP
t _OEH
t _AWD
t _OEA
t _WP
t _OEH
t _CLZ
t _DZC
t _DZO
t _RAC
t _CAC
t _ODD
t _CLZ
t _CPA
t _DZC
Data IN
t _DS
t _OEZ
t _DH
t _AA
t _ODD
t _CLZ
t _CPA
t _DZC
Data IN
t _DH
t _DS
t _OEZ
t _CAC
t _AA
t _ODD
Data IN
t _DH
t _DS
t _OEZ
I/O
V_OH
(Outputs) _VOL
Data
Data
Data
OUT
OUT
OUT
t _RP
t _CRP
t _ASR
Row
"H" or "L"
SPT03031
Fast Page Mode Late Write and Read-Modify Write Cycle
Semiconductor Group
18
1998-10-01