HYB5116400BJ-50-60 Datasheet, PDF (10/26 Pages) Siemens Semiconductor Group – 4M x 4-Bit Dynamic RAM 2k & 4k Refresh

HYB 5116(7)400BJ-50/-60
HYB 3116(7)400BJ/BT-50/-60
4M × 4 DRAM
AC Characteristics (cont’d) ^{5, 6}
T_A = 0 to 70 °C, V_CC = 5 V ± 10 % / V_CC = 3.3 V ± 0.3 V, t_T = 5 ns
Parameter
Symbol
Limit Values
Unit Note
-50
-60
min. max. min. max.
Fast Page Mode Cycle
Fast page mode cycle time
CAS precharge time
Access time from CAS precharge
RAS pulse width
CAS precharge to RAS Delay
t_PC
t_CP
t_CPA
t_RAS
t_RHPC
Fast Page Mode Read-Modify-Write Cycle
Fast page mode read-write cycle time
CAS precharge to WE
t_PRWC
t_CPWD
CAS-before-RAS Refresh Cycle
CAS setup time
CAS hold time
RAS to CAS precharge time
Write to RAS precharge time
Write hold time referenced to RAS
t_CSR
t_CHR
t_RPC
t_WRP
t_WRH
CAS-before-RAS Counter Test Cycle
CAS precharge time
t_CPT
Test Mode
CAS hold time
Write command setup time
Write command hold time
RAS hold time in test mode
t_CHRT
t_WTS
t_WTH
t_RAHT
35 – 40 – ns
10 – 10 – ns
–
30 –
35 ns ⁷
50 200k 60 200k ns
30 – 35 – ns
71 – 80 – ns
48 – 55 – ns
10 – 10 – ns
10 – 10 – ns
5 – 5 – ns
10 – 10 – ns
10 – 10 – ns
35 – 40 – ns
30 – 30 – ns
10 – 10 – ns
10 – 10 – ns
30 – 30 – ns
Semiconductor Group
10
1998-10-01