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K4B4G0446B Datasheet, PDF (52/59 Pages) Samsung semiconductor – DDP 4Gb B-die DDR3 SDRAM Specification
K4B4G0446B
K4B4G0846B
DDP 4Gb DDR3 SDRAM
Note :Clock and Strobe are drawn on a different time scale.
tIS
tIH
CK
CK
DQS
DQS
VDDQ
tDS tDH
VIH(AC) min
VIH(DC) min
dc to VREF
region
VREF(DC)
dc to VREF
region
nominal
slew rate
VIL(DC) max
VIL(AC) max
tIS tIH
tDS tDH
nominal
slew rate
dc to VREF
region
VSS
Delta TR
Delta TF
Hold Slew Rate
Rising Signal =
VREF(DC) - VIL(DC)max
Delta TR
Hold Slew Rate
Falling Signal
=
VIH(DC)min - VREF(DC)
Delta TF
Figure 22 - Illustration of nominal slew rate for hold time tDH (for DQ with respect to strobe) and tIH
(for ADD/CMD with respect to clock).
Page 52 of 59
Rev. 1.0 March 2009