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| K4B4G0446B Datasheet, PDF (51/59 Pages) Samsung semiconductor – DDP 4Gb B-die DDR3 SDRAM Specification | |||
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K4B4G0446B
K4B4G0846B
DDP 4Gb DDR3 SDRAM
Note :Clock and Strobe are drawn on a different time scale.
tIS
tIH
CK
CK
DQS
tIS tIH
DQS
VDDQ
tDS tDH
VIH(AC) min
VREF to ac
region
VIH(DC) min
VREF(DC)
VIL(DC) max
nominal slew
rate
VIL(AC) max
VSS
tVAC
tDS tDH
tVAC
nominal
slew rate
VREF to ac
region
Delta TF
Setup Slew Rate= VREF(DC) - VIL(AC)max
Falling Signal
Delta TF
Delta TR
SeRtiuspinSgleSwignRaalte=
VIH(AC)min - VREF(DC)
Delta TR
Figure 21 - Illustration of nominal slew rate and tVAC for setup time tDS (for DQ with respect to strobe) and tIS
(for ADD/CMD with respect to clock).
Page 51 of 59
Rev. 1.0 March 2009
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