M16C5L_15 Datasheet, PDF (91/116 Pages) Renesas Technology Corp – RENESAS MCU

M16C/5L Group, M16C/56 Group
5. Electrical Characteristics
K-Version
Table 5.51 Flash Memory (Data Flash) Electrical Characteristics
V_CC = 3.0 to 5.5 V at T_opr = -40°C to 125°C, unless otherwise specified.
Symbol
Parameter
Conditions
Standard
Min. Typ.
Max.
-
Program/erase cycles ^{(1, 3, 4)}
V_CC = 3.3 V, T_opr = 25°C
10,000 ⁽²⁾
-
2 words program time
V_CC = 3.3 V, T_opr = 25°C
300
4000
-
Lock bit program time
V_CC = 3.3 V, T_opr = 25°C
140
3000
-
Block erase time
V_CC = 3.3 V, T_opr = 25°C
0.2
3.0
t_d(SR-SUS) Time delay from suspend request
until suspend
5 + -------3--------
f(BCLK)
Unit
times
μs
μs
s
ms
-
Interval from erase start/restart until
following suspend request
-
Suspend interval necessary for
auto-erasure to complete ⁽⁷⁾
-
Time from suspend until erase
restart
0
μs
20
ms
30 + -------1--------
f(BCLK)
μs
-
Program, erase voltage
3.0
-
Read voltage
3.0
-
Program, erase temperature
−40
t_PS
Flash Memory Circuit Stabilization Wait Time
-
Data hold time ⁽⁶⁾
Ambient temperature = 55 °C 20
5.5
V
5.5
V
125
°C
50
μs
year
Notes:
1. Definition of program and erase cycles
The program and erase cycles refer to the number of per-block erasures.
If the program and erase cycles are n (n = 10,000), each block can be erased n times.
For example, if a 4 KB block is erased after writing 2 word data 1,024 times, each to a different address, this
counts as one program and erase cycles. Data cannot be written to the same address more than once without
erasing the block (rewrite prohibited).
2. Cycles to guarantee all electrical characteristics after program and erase. (1 to Min. value can be guaranteed).
3. In a system that executes multiple programming operations, the actual erasure count can be reduced by writing
to sequential addresses in turn so that as much of the block as possible is used up before performing an erase
operation. For example, when programming groups of 16 bytes, the effective number of rewrites can be
minimized by programming up to 256 groups before erasing them all in one operation. In addition, averaging the
erasure cycles between blocks A and B can further reduce the actual erasure cycles. It is also advisable to retain
data on the erasure cycles of each block and limit the number of erase operations to a certain number.
4. If an error occurs during block erase, attempt to execute the clear status register command, then execute the
block erase command at least three times until the erase error does not occur.
5. Customers desiring program/erase failure rate information should contact a Renesas Electronics sales office.
6. The data hold time includes time that the power supply is off or the clock is not supplied.
7. After an erase start or erase restart, if an interval of at least 20 ms is not set before the next suspend request,
the erase sequence cannot be completed.
R01DS0035EJ0110 Rev.1.10
Sep 01, 2011
Page 91 of 112