M16C5L_15 Datasheet, PDF (86/116 Pages) Renesas Technology Corp – RENESAS MCU

M16C/5L Group, M16C/56 Group
5. Electrical Characteristics
K-Version
5.4.2 Recommended Operating Conditions
Table 5.46 Operating Conditions (1)
V_CC = 3.0 V to 5.5 V, T_opr = -40°C to 125°C unless otherwise specified.
Symbol
Characteristic
Standard
Unit
Min. Typ. Max.
V_CC
Supply voltage
3.0
5.5
V
AV_CC Analog supply voltage
V_CC
V
V_SS
Ground voltage
0
V
AV_SS Analog ground voltage
0
V
P0_0 to P0_7, P1_0 to P1_7, Input level 0.50 V_CC
P2_0 to P2_7, P3_0 to P3_7,
P6_0 to P6_7, P7_0 to P7_7,
P8_0 to P8_7, P9_0 to P9_3,
V_IH
High level input ^{P9_5 to P9_7, P10_0 to}
voltage
P10_7
Input level 0.70 V_CC
XIN, RESET, CNVSS
0.7 V_CC
0.85V_CC
0.8 V_CC
V_CC
V
V_CC
V
V_CC
SDAMM, SCLMM
When I²C-bus input level selected
When SMBUS input level selected
0.7 V_CC
2.1
V_CC
V
V_CC
V
P0_0 to P0_7, P1_0 to P1_7, Input level 0.50 V_CC
P2_0 to P2_7, P3_0 to P3_7,
P6_0 to P6_7, P7_0 to P7_7,
P8_0 to P8_7, P9_0 to P9_3, _{Input level 0.70 VCC}
V_IL
Low level input P9_5 to P9_7, P10_0 to
voltage
P10_7
XIN, RESET, CNVSS
0
0.3 V_CC V
0
0.45V_CC V
0
0.2 V_CC V
SDAMM, SCLMM
When I²C-bus input level selected
0
When SMBUS input level selected
0
0.3 V_CC V
0.8
V
I_OH(sum)
High peak
output current
Sum of I_OH(peak) at P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0
to P3_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_3,
P9_5 to P9_7, P10_0 to P10_7
-80.0 mA
I_OH(peak)
High level peak
output current
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P6_0 to
P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_3, P9_5 to P9_7,
P10_0 to P10_7
-10.0 mA
I_OH(avg)
High level
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P6_0 to
average output P6_7, P7_0 to P7_7, P8_0 to P8_7,P9_0 to P9_3, P9_5 to P9_7,
current ⁽²⁾
P10_0 to P10_7
-5.0 mA
I_OL(sum)
Low peak
output current
Sum of I_OL(peak) at P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0
to P3_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_3,
P9_5 to P9_7, P10_0 to P10_7
80.0 mA
I_OL(peak)
Low level peak
output current
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P6_0 to
P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_3, P9_5 to P9_7,
P10_0 to P10_7
10.0 mA
I_OL(avg)
Low level
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P6_0 to
average output P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_3, P9_5 to P9_7,
current ⁽²⁾
P10_0 to P10_7
5.0 mA
f_(XIN)
Main clock input oscillation frequency ⁽²⁾
0
20 MHz
f_(XCIN) Sub clock oscillation frequency
32.768 50 kHz
f_{(PLL) PLL clock oscillation frequency} (2)
10
32 MHz
f_(BCLK) CPU operation frequency
0
32 MHz
t_su(PLL) Wait time to stabilize PLL frequency synthesizer
1
ms
Notes:
1. The mean output current is the mean value within 100 ms.
2. Refer to Figure 5.24 “Main Clock Input Oscillation Frequency, PLL Clock Oscillation Frequency” for the relationship between
main clock oscillation frequency/PLL clock oscillation frequency and supply voltage.
R01DS0035EJ0110 Rev.1.10
Sep 01, 2011
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