M16C5L_15 Datasheet, PDF (23/116 Pages) Renesas Technology Corp – RENESAS MCU

M16C/5L Group, M16C/56 Group
3. Memory
00000h
00400h
XXXXXh
SFRs
Internal RAM
Reserved ⁽¹⁾
Internal RAM
Capacity XXXXXh
4 KB
013FFh
8 KB
023FFh
12 KB
033FFh
20 KB
053FFh
Internal ROM
Capacity YYYYYh
64 KB
F0000h
96 KB
E8000h
128 KB
E0000h
256 KB
C0000h
0D000h
0D800h
0E000h
10000h
14000h
SFRs
Reserved ⁽¹⁾
Internal ROM
(Data flash)
Internal ROM
(Program ROM 2)
13000h
13FF0h
13FFFh
On-chip debugger
monitor area
User boot code area
Reserved ⁽¹⁾
YYYYYh
Internal ROM
(Program ROM 1)
FFFFFh
Relocatable vector table
256 bytes beginning with the start
address set in the INTB register
FFE00h
FFFD8h
FFFDBh
FFFFFh
Special page vector
table
Reserved ⁽²⁾
Fixed vector table
ID code address
OFS1 address
OFS2 address
The above assumes the following:
-The PM10 bit in the PM1 register is set to 1 (addresses from 0E000h to 0FFFFh are used as data flash)
-The PRG2C0 bit in the PRG2C register is set to 0 (program ROM 2 enabled)
Notes:
1. Do not access these reserved areas.
2. Do not change the data from FFh.
Figure 3.1 Memory Map
R01DS0035EJ0110 Rev.1.10
Sep 01, 2011
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