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4518 Datasheet, PDF (81/160 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
4518 Group
Serial I/O control register J1
at reset : 00002
R/W
at RAM back-up : state retained
TAJ1/TJ1A
J13 J12
Synchronous clock
J13
0 0 Instruction clock (INSTCK) divided by 8
Serial I/O synchronous clock selection bits 0 1 Instruction clock (INSTCK) divided by 4
J12
1 0 Instruction clock (INSTCK) divided by 2
1 1 External clock (SCK input)
J11 J10
Port function
J11
0 0 P20, P21,P22 selected/SCK, SOUT, SIN not selected
Serial I/O port function selection bits
0 1 SCK, SOUT, P22 selected/P20, P21, SIN not selected
J10
1 0 SCK, P21, SIN selected/P20, SOUT, P22 not selected
1 1 SCK, SOUT, SIN selected/P20, P21,P22 not selected
A/D control register Q1
Q13 A/D operation mode selection bit
Q12
Analog input pin selection bits
Q11
Q10
at reset : 00002
at RAM back-up : state retained
A/D conversion mode
Comparator mode
Q12 Q11 Q10
0 0 0 AIN0
0 0 1 AIN1
0 1 0 AIN2
0 1 1 AIN3
1 0 0 Not available
1 0 1 Not available
1 1 0 Not available
1 1 1 Not available
Analog input pins
R/W
TAQ1/TQ1A
A/D control register Q2
Q23 Not used
Q22
P62/AIN2, P63/AIN3 pin function selection bit
Q21
P61/AIN1 pin function selection bit
Q20
P60/AIN0 pin function selection bit
at reset : 00002
at RAM back-up : state retained
0
This bit has no function, but read/write is enabled.
1
0
P62, P63
1
AIN2, AIN3
0
P61
1
AIN1
0
P60
1
AIN0
R/W
TAQ2/TQ2A
A/D control register Q3
at reset : 00002
at RAM back-up : state retained
Q33
Not used
0
This bit has no function, but read/write is enabled.
1
0
Instruction clock (INSTCK)
Q32 A/D converter operation clock selection bit
1
On-chip oscillator (f(RING))
Q31 Q30
Division ratio
Q31
0 0 Frequency divided by 6
A/D converter operation clock division
ratio selection bits
Q30
0 1 Frequency divided by 12
1 0 Frequency divided by 24
1 1 Frequency divided by 48
Note: “R” represents read enabled, and “W” represents write enabled.
R/W
TAQ3/TQ3A
Rev.3.01 2005.06.15 page 81 of 157
REJ03B0008-0301