4518 Datasheet, PDF (67/160 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4518 Group
CLOCK CONTROL
The clock control circuit consists of the following circuits.
• On-chip oscillator (internal oscillator)
• Ceramic resonator
• RC oscillation circuit
• Quartz-crystal oscillation circuit
• Multi-plexer (clock selection circuit)
• Frequency divider
• Internal clock generating circuit
The system clock and the instruction clock are generated as the
source clock for operation by these circuits.
Figure 56 shows the structure of the clock control circuit.
The 4518 Group operates by the on-chip oscillator clock (f(RING))
which is the internal oscillator after system is released from reset.
Also, the ceramic resonator, the RC oscillation or quartz-crystal os-
cillator can be used for the main clock (f(XIN)) of the 4518 Group.
The CMCK instruction, CRCK instruction or CYCK instruction is ex-
ecuted to select the ceramic resonator, RC oscillator or
quartz-crystal oscillator respectively.
The CMCK, CRCK, and CYCK instructions can be used only to se-
lect main clock (f(XIN)). In this time, the start of oscillation and the
switch of system clock are not performed.
The oscillation start/stop of main clock f(XIN) is controlled by bit 1
of register MR. The system clock is selected by bit 0 of register
MR. The oscillation start/stop of on-chip oscillator is controlled by
register RG.
The oscillation circuit by the CMCK, CRCK or CYCK instruction
can be selected only at once.
The oscillation circuit corresponding to the first executed one of
these instructions is valid.
Execute the main clock (f(XIN)) selection instruction (CMCK, CRCK
or CYCK instruction) in the initial setting routine of program (ex-
ecuting it in address 0 in page 0 is recommended).
When the CMCK, CRCK, and CYCK instructions are never ex-
ecuted, main clock (f(XIN)) cannot be used and system can be
operated only by on-chip oscillator.
The no operated clock source (f(RING)) or (f(XIN)) cannot be used
for the system clock. Also, the clock source (f(RING) or f(XIN)) se-
lected for the system clock cannot be stopped.
On-chip oscillator
(internal oscillator)
RG0
MR0
1
0
XIN
XOUT
Ceramic
resonance
RC oscillation
Multi-
plexer
Quartz-crystal
oscillation
Fig. 56 Clock control circuit structure
Division circuit
Divided by 8
Divided by 4
Divided by 2
MR3, MR2
11
10
01
00
System clock (STCK)
Internal clock
generating circuit
(divided by 3)
Instruction clock
(INSTCK)
S
RQ
QS
R
CMCK instruction
QS
R
CRCK instruction
MR1
QS
R
CYCK instruction
QS
Internal reset signal
Key-on wakeup signal
R _{EPOF instruction + POF instruction}
Rev.3.01 2005.06.15 page 67 of 157
REJ03B0008-0301