4518 Datasheet, PDF (70/160 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4518 Group
(7) Clock control register MR
Register MR controls system clock. Set the contents of this register
through register A with the TMRA instruction. In addition, the TAMR
instruction can be used to transfer the contents of register MR to
register A.
(8) Clock control register RG
Register RG controls start/stop of on-chip oscillator. Set the con-
tents of this register through register A with the TRGA instruction.
Table 22 Clock control registers
Clock control register MR
at reset : 11112
at RAM back-up : 11112
MR3
MR2
MR1
MR0
MR3 MR2
Operation mode
0 0 Through mode (frequency not divided)
Operation mode selection bits
0 1 Frequency divided by 2 mode
1 0 Frequency divided by 4 mode
1 1 Frequency divided by 8 mode
0
Main clock (f(XIN)) oscillation enabled
Main clock f(XIN) oscillation circuit control bit
1
Main clock (f(XIN)) oscillation stop
0
Main clock (f(XIN))
System clock oscillation source selection bit
1
Main clock (f(RING))
R/W
TAMR/
TMRA
Clock control register RG
0
RG0 On-chip oscillator (f(RING)) control bit
1
Note: “R” represents read enabled, and “W” represents write enabled.
at reset : 02
at RAM back-up : 02
On-chip oscillator (f(RING)) oscillation enabled
On-chip oscillator (f(RING)) oscillation stop
ROM ORDERING METHOD
1.Mask ROM Order Confirmation Form^✽
2.Mark Specification Form^✽
3.Data to be written to ROM, in EPROM form (three identical cop-
ies) or one floppy disk.
✽ For the mask ROM confirmation and the mark specifications, re-
fer to the “Renesas Technology Corp.” Homepage
(http://www.renesas.com/en/rom).
W
TRGA
Rev.3.01 2005.06.15 page 70 of 157
REJ03B0008-0301