4518 Datasheet, PDF (153/160 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4518 Group
A/D CONVERTER CHARACTERISTICS
(Ta = –20 °C to 85 °C, unless otherwise noted)
Symbol
Parameter
Test conditions
–
–
–
V0T
VFST
–
IADD
TCONV
–
–
–
Resolution
Linearity error
2.7(3.0) V ≤ VDD ≤ 5.5 V ((): One Time PROM version)
Mask ROM version
2.2 V ≤ VDD < 2.7 V
Differential non-linearity error 2.2 (3.0) V ≤ VDD ≤ 5.5 V ((): One Time PROM version)
Zero transition voltage
Mask ROM version
VDD = 5.12 V
VDD = 3.072 V
VDD = 2.56 V
One Time PROM version VDD = 5.12 V
VDD = 3.072 V
Full-scale transition voltage Mask ROM version
VDD = 5.12 V
VDD = 3.072 V
VDD = 2.56 V
One Time PROM version VDD = 5.12 V
VDD = 3.072 V
Absolute accuracy
Mask ROM version
(Quantization error excluded) 2.0 V ≤ VDD < 2.2 V
A/D operating current
VDD = 5 V
(Note 1)
VDD = 3 V
A/D conversion time
f(XIN) = 6 MHz
f(STCK) = f(XIN) (XIN through mode)
ADCK=INSTCK/6
Comparator resolution
Comparator error (Note 2) Mask ROM version
VDD = 5.12 V
VDD = 3.072 V
VDD = 2.56 V
One Time PROM version VDD = 5.12 V
VDD = 3.072 V
Comparator comparison time f(XIN) = 6 MHz
f(STCK) = f(XIN) (XIN through mode)
ADCK=INSTCK/6
Min.
0
0
0
0
3
5105
3064.5
2552.5
5100
3065
Limits
Typ.
10
7.5
7.5
15
13
5115
3072
2560
5115
3075
150
75
Unit
Max.
10
bits
±2
LSB
±4
±0.9 LSB
20
mV
15
15
30
23
5125 mV
3079.5
2567.5
5130
3085
±8
LSB
450
µA
225
31
µs
8
bits
±20
mV
±15
±15
±30
±23
4
µs
Notes 1: When the A/D converter is used, IADD is added to IDD (supply current).
2: As for the error from the ideal value in the comparator mode, when the contents of the comparator register is n, the logic value of the comparison
voltage Vref which is generated by the built-in DA converter can be obtained by the following formula.
Logic value of comparison voltage Vref
VDD
Vref =
✕n
256
n = Value of register AD (n = 0 to 255)
Rev.3.01 2005.06.15 page 153 of 157
REJ03B0008-0301