M16C5LD Datasheet, PDF (8/85 Pages) Renesas Technology Corp – RENESAS MCU

M16C/5LD Group, M16C/56D Group
1. Overview
1.4 Block Diagram
Figure 1.3 shows a block diagram of M16C/5LD Group, M16C/56D Group 80-pin package. Figure 1.4
shows a block diagram of the M16C/5LD Group, M16C/56D Group 64-pin package.
8
8
8
8
I/O ports
Port P0
Port P1
Port P2
Port P3
Peripherals
Timer (16-bit)
Output (timer A): 5
Input (timer B): 3
Three-phase motor control
circuit
Timer S
(Input capture/output compare)
Time measurement: 8 channels
Waveform generating: 8 channels
Task monitoring timer
(1 channel)
Real-time clock
(8-bit x 1 channel)
A/D converter
(10-bit x 27 channels) (A/D circuit)
(10-bit x 4 channels) (A/D1 circuit)
Watchdog timer
(15 bits)
UART/clock synchronous
serial interface
(8-bit x 5 channels)
DMAC
(4 channels)
Multi-master I²C bus
CAN module
(32-slot message buffer,
1 channel)
(M16C/5LD Group only)
Clock generator
XIN-XOUT
XCIN-XCOUT
125-kHz on-chip oscillator
PLL frequency synthesizer
125-kHz on-chip oscillator
dedicated to watchdog timer
CRC calculator
(CCITT, CRC-16)
Voltage detector
Power-on reset
On-chip debugger
M16C/60 Series CPU core
R0H R0L
R1H R1L
R2
RR3 ₃
A0
A1
FB
FB
SB
USP
ISP
INTB
PC
FLG
Memory
ROM ⁽¹⁾
RAM ⁽²⁾
Multiplier
Notes:
1. ROM size depends on MCU type.
2. RAM size depends on MCU type
Figure 1.3 M16C/5LD Group, M16C/56D Group 80-Pin Block Diagram
REJ03B0307-0110 Rev.1.10 Dec 01, 2009
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