M16C5LD Datasheet, PDF (22/85 Pages) Renesas Technology Corp – RENESAS MCU

M16C/5LD Group, M16C/56D Group
3. Memory
3. Memory
Special Function Registers (SFRs) are allocated from address 00000h to 003FFh and from 0D000h to
0D7FFh. Peripheral function control registers are located here. All blank spaces within SFRs are reserved,
so do not access any blank spaces.
The internal RAM is allocated from address 00400h to superior direction. For example, a 8-Kbyte internal
RAM is addressed from 00400h to 023FFh. The internal RAM is used not only for data storage but also for
stack area when subroutines are called or when interrupt request are acknowledged.
The internal ROM is flash memory. Three internal ROM areas are available: data flash, program ROM 1,
and program ROM 2.
The data flash is addressed from 0E000h to 0FFFFh. This data flash space is used not only for data storage
but also for program storage.
Program ROM 2 is assigned addresses 10000h to 13FFFh. Program ROM 1 is assigned addresses
FFFFFh to inferior direction. For example, the 64-Kbyte program ROM 1 space has addresses F0000h to
FFFFFh.
The special page vectors are assigned addresses FFE00h to FFFD7h. They are used for the JMPS
instruction and JSRS instruction. Refer to the M16C/60, M16C/20, M16C/Tiny Series Software Manual for
details.
The fixed vector table for interrupts, ID code write address, OFS1 address and OSF2 address are assigned
addresses FFFDBh to FFFFFh.
The 256 bytes beginning with the start address set in the INTB register compose the relocatable vector table
for interrupts.
00000h
00400h
XXXXXh
SFRs
Internal RAM
Reserved
0D000h
SFRs
Internal RAM
Capacity XXXXXh
4 Kbytes 013FFh
0D800h
0E000h
10000h
14000h
Reserved
Internal ROM
(Data flash)
Internal ROM
(Program ROM 2)
13000h
13FF0h
13FFFh
On-chip debugger
monitor area
User boot code area
8 Kbytes 023FFh
12 Kbytes 033FFh
20 Kbytes 053FFh
Reserved
Relocatable vector table
256 bytes beginning with the start
address set in the INTB register
Internal ROM
Capacity YYYYYh
FFE00h _{Special page vector}
table
64 Kbytes
96 Kbytes
128 Kbytes
F0000h
E8000h
E0000h
YYYYYh
Internal ROM
(Program ROM 1)
FFFD8h
FFFDBh
Reserved
Fixed vector table
ID code address
256 Kbytes C0000h
FFFFFh
OFS1 address, OFS2
FFFFFh
address
Notes:
1. Do not access the reserved areas.
2. The figure above applies under the following conditions:
-The PM10 bit in the PM1 register is set to 1 (addresses from 0E000h to 0FFFFh are used as data flash)
-The PRG2C0 bit in the PRG2C register is set to 0 (program ROM 2 enabled)
Figure 3.1 Memory Map
REJ03B0307-0110 Rev.1.10 Dec 01, 2009
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