H8S-2258 Datasheet, PDF (643/1071 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2200 Series

Section 15 Serial Communication Interface (SCI)
Bit Bit Name
Initial
Value
R/W
Description
3
BCP1
0
R/W
Base Clock Pulse 0 and 1
2
BCP0
0
R/W
These bits specify the number of base clock
periods in a 1-bit transfer interval on the Smart
Card interface.
00: 32 clock (S = 32)
01: 64 clock (S = 64)
10: 372 clock (S = 372)
11: 256 clock (S = 256)
For details, refer to section 15.7.4, Receive Data
Sampling Timing and Reception Margin. S stands
for the value of S in BRR (see section 15.3.9, Bit
Rate Register (BRR)).
1
CKS1
0
R/W
Clock Select 0 and 1
0
CKS0
0
R/W
These bits select the clock source for the baud rate
generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relationship between the bit rate register
setting and the baud rate, see section 15.3.9, Bit
Rate Register (BRR). n is the decimal
representation of the value of n in BRR (see
section 15.3.9, Bit Rate Register (BRR)).
Note: etu (Elementary Time Unit): Time for transfer of 1 bit
15.3.6 Serial Control Register (SCR)
SCR is a register that enables or disables SCI transfer operations and interrupt requests, and is also
used to selection of the transfer clock source. For details on interrupt requests, refer to section
15.9, Interrupt Sources. Some bit functions of SCR differ between normal serial communication
interface mode and Smart Card interface mode.
Rev. 5.00 Aug 08, 2006 page 557 of 982
REJ09B0054-0500