H8S-2258 Datasheet, PDF (527/1071 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2200 Series

Section 12 8-Bit Timers
Section 12 8-Bit Timers
The H8S/2258 Group, H8S/2239 Group, and H8S/2238 Group have an on-chip 8-bit timer module
with four channels (TMR_0, TMR_1, TMR_2, and TMR_3) operating on the basis of an 8-bit
counter.
The H8S/2237 Group and H8S/2227 Group have an on-chip 8-bit timer module with two channels
(TMR_0 and TMR_1) operating on the basis of an 8-bit counter.
The 8-bit timer module can be used to count external events and be used as a multifunction timer
in a variety of applications, such as generation of counter reset, interrupt requests, and pulse output
with an arbitrary duty cycle using a compare-match signal with two registers.
12.1 Features
• Selection of clock sources
Selected from three internal clocks (φ/8, φ/64, and φ/8192) and an external clock.
• Selection of three ways to clear the counters
The counters can be cleared on compare-match A or B, or by an external reset signal.
• Timer output controlled by two compare-match signals
The timer output signal in each channel is controlled by two independent compare-match
signals, enabling the timer to be used for various applications, such as the generation of pulse
output or PWM output with an arbitrary duty cycle.
• Cascading of the two channels
 TMR_0 and TMR_1 cascading
The module can operate as a 16-bit timer using TMR_0 as the upper half and channel
TMR_1 as the lower half (16-bit count mode).
TMR_1 can be used to count TMR_0 compare-match occurrences (compare-match count
mode).
 TMR_2* and TMR_3* cascading
The module can operate as a 16-bit timer using TMR_2 as the upper half and channel
TMR_3 as the lower half (16-bit count mode).
TMR_3 can be used to count TMR_2 compare-match occurrences (compare-match count
mode).
• Multiple interrupt sources for each channel
Two compare-match interrupts and one overflow interrupt can be requested independently.
• Generation of A/D conversion start trigger
Channel 0 compare-match signal can be used as the A/D conversion start trigger.
Rev. 5.00 Aug 08, 2006 page 441 of 982
REJ09B0054-0500