H8S-2258 Datasheet, PDF (338/1071 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2200 Series

Section 8 DMA Controller (DMAC)
Address T_A
1st block
2nd block
Transfer
Consecutive transfer
of M bytes or words
is performed in
response to one
request
Block area
Address T_B
Address B_B
Address B_A
Nth block
Legend:
Address T_A = L_A
Address T_B = L_B
Address B_A = L_A + SAIDE ( 1)^SAID (2^DTSZ (M N 1))
Address B_B = L_B + DAIDE ( 1)^DAID (2^DTSZ (N 1))
Where : L_A = Value set in MARA
L_B = Value set in MARB
N = Value set in ETCRB
M = Value set in ETCRAH and ETCRAL
Figure 8.14 Operation in Block Transfer Mode (BLKDIR = 0)
Rev. 5.00 Aug 08, 2006 page 252 of 982
REJ09B0054-0500