H8S-2258 Datasheet, PDF (324/1071 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2200 Series

Section 8 DMA Controller (DMAC)
Sequential mode setting
Set DMABCRH
Set transfer source
and transfer destination
addresses
Set number of transfers
Set DMACR
Read DMABCRL
[1] Set each bit in DMABCRH.
Clear the FAE bit to 0 to select short address
mode.
Specify enabling or disabling of internal
interrupt clearing with the DTA bit.
[1]
[2] Set the transfer source address and transfer
destination address in MAR and IOAR.
[3] Set the number of transfers in ETCR.
[2]
[4] Set each bit in DMACR.
Set the transfer data size with the DTSZ bit.
Specify whether MAR is to be incremented or
decremented with the DTID bit.
Clear the RPE bit to 0 to select sequential
[3]
mode.
Specify the transfer direction with the DTDIR
bit.
Select the activation source with bits DTF3 to
DTF0.
[4]
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
Specify enabling or disabling of transfer end
[5]
interrupts with the DTIE bit.
Set the DTE bit to 1 to enable transfer.
Set DMABCRL
[6]
Sequential mode
Figure 8.4 Example of Sequential Mode Setting Procedure
Rev. 5.00 Aug 08, 2006 page 238 of 982
REJ09B0054-0500