HD151TS201AT Datasheet, PDF (6/29 Pages) Renesas Technology Corp – Mother Board Clock Generator for Intel P4 Chipset Banias and Dothan processor / ODEM and MONTARA-GM chip set

HD151TS201AT
Table2 Hardware Clock Frequency Table (MHz)
S2 S1 S0 CPU
3V66
66OUT[2:0] 66IN
3V66[4:0]
3V66_5
0
0
0
66.67
66.67
66.67
66.67
0
0
1
100
66.67
66.67
66.67
0
1
0
200
66.67
66.67
66.67
0
1
1
133.33 66.67
66.67
66.67
1
0
0
66.67
66.67
66IN
66IN
1
0
1
100
66.67
66IN
66IN
1
1
0
200
66.67
66IN
66IN
1
1
1
133.33 66.67
66IN
66IN
Mid 0
0
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Mid 0
1
TCLK/2 TCLK/4 TCLK/4
TCLK/4
Mid 1
0
150
50
50
50
Mid 1
1
166.67 55.5
55.5
55.5
Note: TCLK is a test clock over driven on the XIN during test mode.
PCI
Note
33.33
33.33
33.33
33.33
66MHzIN/2
66MHzIN/2
66MHzIN/2
66MHzIN/2
Hi-Z
TCLK/8
25
27.7
Un-Buff Mode
Un-Buff Mode
Un-Buff Mode
Un-Buff Mode
Buff Mode
Buff Mode
Buff Mode
Buff Mode
Tristate Mode
Test Mode
Table3 CPUCLK Outputs Specification
MULT0
(pin43)
0
1
Board Target Reference R,
Trace/Term Z Iref = VDD/(3Rr)
Output Current Ioh Voh @Z
50 Ω
50 Ω
Rr=221 1% I_REF=5.00mA 4 x Iref
Rr=475 1% I_REF=2.32mA 6 x Iref
1.0V @50 Ω
0.7V @50 Ω
Rev.1.00, Oct.21.2003, page 6 of 28