HD151TS201AT Datasheet, PDF (27/29 Pages) Renesas Technology Corp – Mother Board Clock Generator for Intel P4 Chipset Banias and Dothan processor / ODEM and MONTARA-GM chip set

HD151TS201AT
Clock Out
tcycle n
tcycle n+1
t _CCS = (tcycle n) - (tcycle n+1)
Figure1 Cycle to Cycle Jitter (3.3 V Single Ended Clock Output)
Clock Outx
1.5 V
Clock Outy
1.5 V
tskS
Figure2 Output Clock Skew (3.3 V Single Ended Clock Output)
CPUT
R_S = 33.2 Ω
TS201
CPUC
R_S = 33.2 Ω
Z_LT = Z_LC = 50 Ω
LT
LC
R_I(ref) =
475 Ω
R_P =
49.9 Ω
R_P =
49.9 Ω
C_L = 2 pF
C_L = 2 pF
Figure3 Load Circuit for CPUT/C
Rev.1.00, Oct.21.2003, page 27 of 28