HD151TS201AT Datasheet, PDF (10/29 Pages) Renesas Technology Corp – Mother Board Clock Generator for Intel P4 Chipset Banias and Dothan processor / ODEM and MONTARA-GM chip set

HD151TS201AT
I²C Controlled Register Bit Map (cont.)
Byte5 Control Register
Bit Description
7
Reserved
6
Reserved
5
66IN to 66OUT [2:0] delay bit1
4
66IN to 66OUT[2:0] delay bit0
3
DOT Slew Rate Control bit1
2
DOT Slew Rate Control bit0
1
USB Slew Rate Control bit1
0
USB Slew Rate Control bit0
Contents
00 = Default 01 = Fast1
10 = Fast2 11 = Slow1
00 = Default 01 = Fast1
10 = Fast2 11 = Slow1
Default
0
0
0
0
0
0
0
0
Byte6 Vendor ID Register
Bit Description
Contents
7
Revision Code
6
5
4
3
Vendor ID Register
Renesas = “1111”
2
1
0
Note: This register is read only register. Don’t write any data.
Default
0
0
0
1
1
1
1
1
Byte7 Byte Count Read Back Register
Bit Description
7
Byte Count setting bit7
6
Byte Count setting bit6
5
Byte Count setting bit5
4
Byte Count setting bit4
3
Byte Count setting bit3
2
Byte Count setting bit2
1
Byte Count setting bit1
0
Byte Count setting bit0
Contents
Writing to this register will configure byte.
Count and how many bytes will be read back.
Default is 17hex = 23 bytes.
Default
0
0
0
1
0
1
1
1
Rev.1.00, Oct.21.2003, page 10 of 28