HD151TS201AT Datasheet, PDF (13/29 Pages) Renesas Technology Corp – Mother Board Clock Generator for Intel P4 Chipset Banias and Dothan processor / ODEM and MONTARA-GM chip set

HD151TS201AT
I²C Controlled Register Bit Map (cont.)
Byte12 Clock Outputs Divider Control Register
Bit Description
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3
Reserved
2
Reserved
1
Reserved
0
Reserved
Contents
Byte13 Clock Outputs Divider Control Register
Bit Description
Contents
7
PCISTOP# pin Enable
0 = Enable, 1 = Disable
6
CPUSTOP# pin Enable
0 = Enable, 1 = Disable
5
PWRDWN# pin Enable
0 = Enable, 1 = Disable
4
Reserved
3
Reserved
2
Reserved
1
Reserved
0
Reserved
Note: Byte 12 & 13 must be written together in every case.
Default
0
0
0
0
0
0
0
0
Default
0
0
0
0
0
0
0
0
Rev.1.00, Oct.21.2003, page 13 of 28