TL16C752C Datasheet, PDF (40/50 Pages) Texas Instruments – DUAL UART WITH 64-BYTE FIFO

TL16C752C
DUAL UART
WITH 64-BYTE FIFO
SLLS646 – MARCH 2008
IrDA Overview
Receive Shift Register
www.ti.com
Transmit Shift Register
IREN
RCVEN
Int_Tx
Tx
Int_Rx
Rx
IrDA Converter
To Optoelectronic
LED
From
Optoelectronic
Pin Diode
Baud Clock
Reset
Figure 27. IrDA Mode
The infrared data association (IrDA) defines several protocols for sending and receiving serial infrared data,
including rates of 115.2 kbps, 0.576 Mbps, 1.152 Mbps, and 4 Mbps. The low rate of 115.2 kbps was specified
first and the others must maintain downward compatibility with it. At the 115.2 kbps rate, the protocol
implemented in the hardware is fairly simple. It primarily defines a serial infrared data word to be surrounded by a
start bit equal to 0 and a stop bit equal to 1. Individual bits are encoded or decoded the same whether they are
start, data, or stop bits. The IrDA engine in the TL16C752C evaluate only single bits and only follow the 115.2
kbps protocol. The 115.2 kbps rate is a maximum rate. When both ends of the transfer are set up to a lower but
matching speed, the protocol still works. The clock used to code or sample the data is 16 times the baud rate, or
1.843 MHz maximum. To code a 1, no pulse is sent or received for 1-bit time period, or 16 clock cycles. To code
a 0, one pulse is sent or received within a 1-bit time period, or 16 clock cycles. The pulse must be at least 1.6 µs
wide and 3 clock cycles long at 1.843 MHz. At lower baud rates the pulse can be 1.6 µs wide or as long as 3
clock cycles. The transmitter output, Tx, is intended to drive a LED circuit to generate an infrared pulse. The LED
circuits work on positive pulses. A terminal circuit is expected to create the receiver input, Rx. Most, but not all,
PIN circuits have inversion and generate negative pulses from the detected infrared light. Their output is normally
high. The TL16C752C can decode either negative or positive pulses on Rx.
IrDA Encoder Function
Serial data from a UART is encoded to transmit data to the optoelectronics. While the serial data input to this
block (Int_Tx) is high, the output (Tx) is always low, and the counter used to form a pulse on Tx is continuously
cleared. After Int_Tx resets to 0, Tx rises on the falling edge of the seventh 16XCLK. On the falling edge of the
tenth 16XCLK pulse, Tx falls, creating a 3-clock-wide pulse. While Int_Tx stays low, a pulse is transmitted during
the seventh to tenth clocks of each 16-clock bit cycle.
Figure 28. IrDA-SIR Encoding Scheme – Detailed Timing
Diagram
Figure 29. Encoding Scheme – Macro View
After reset, Int_Rx is high and the 4-bit counter is cleared. When a falling edge is detected on Rx, Int_Rx falls on
the next rising edge of 16XCLK with sufficient setup time. Int_Rx stays low for 16 cycles (16XCLK) and then
returns to high as required by the IrDA specification. As long as no pulses (falling edges) are detected on Rx,
Int_Rx remains high.
40
Submit Documentation Feedback
Product Folder Link(s): TL16C752C
Copyright © 2008, Texas Instruments Incorporated