English
Language : 

TL16C752C Datasheet, PDF (4/50 Pages) Texas Instruments – DUAL UART WITH 64-BYTE FIFO
TL16C752C
DUAL UART
WITH 64-BYTE FIFO
SLLS646 – MARCH 2008
NAME
TERMINAL
NO.
PFB
RHB
RTSA, RTSB,
33, 22 21, 14
RXA, RXB,
RXRDYA,
RXRDYB
TXA, TXB,
TXRDYA,
TXRDYB
VCC
XTAL1
XTAL2
5, 4
4, 3
31, 18
7, 8
43, 6
6, 42
13
5, 6
4, 26
9
14
10
TERMINAL FUNCTIONS (continued)
www.ti.com
I/O DESCRIPTION
Request to send (active low). These outputs are associated with individual UART
channels A through D. A low on the RTS pins indicates the transmitter has data ready
O
and waiting to send. Writing a 1 in the modem control register (MCR[1]) sets these pins
to low, indicating data is available. After a reset, these pins are set to 1. These pins only
affect the transmit and receive operation when auto-RTS function is enabled through the
enhanced feature register (EFR[6]), for hardware flow control operation.
Receive data input. These inputs are associated with individual serial channel data to
the TL16C752C. During the local loopback mode, these RX input pins are disabled and
I TX data is internally connected to the UART RX input internally. During normal mode,
RXn should be held high when no data is being received. These outputs also can be
used in IrDA mode. See the IrDA mode section for more information.
Receive ready (active low). RXRDYA and RXRDYB go low when the trigger level has
O been reached or a timeout interrupt occurs. They go high when the RX FIFO is empty or
there is an error in RX FIFO.
Transmit data. These outputs are associated with individual serial transmit channel data
O from the TL16C752C. During the local loopback mode, the TX input pin is disabled and
TX data is internally connected to the UART RX input.
O
Transmit ready (active low). TXRDYA and TXRDYB go low when there are a trigger
level number of spares available. They go high when the TX buffer is full.
Pwr Power supply inputs
Crystal or external clock input. XTAL1 functions as a crystal input or as an external clock
I
input. A crystal can be connected between XTAL1 and XTAL2 to form an internal
oscillator circuit (see Figure 10). Alternatively, an external clock can be connected to
XTAL1 to provide custom data rates.
O
Output of the crystal oscillator or buffered clock. See also XTAL1. XTAL2 is used as a
crystal oscillator output or buffered clock output.
4
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TL16C752C