TL16C752C Datasheet, PDF (15/50 Pages) Texas Instruments – DUAL UART WITH 64-BYTE FIFO

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TL16C752C
DUAL UART
WITH 64-BYTE FIFO
SLLS646 – MARCH 2008
Programmable Baud Rate Generator
The TL16C752C UART contains a programmable baud generator that divides reference clock by a divisor in the
range between 1 and (216−1). The output frequency of the baud rate generator is 16× the baud rate. An
additional divide-by-4 prescaler is also available and can be selected by the CLKSEL pin or MCR[7], as shown in
the following. The formula for the divisor is:
Divisor = (XTAL crystal input frequency / prescaler) / (desired baud rate X 16)
Where
prescaler =
1 when CLKSEL = high during reset, or MCR[7] is set to 0 after reset
4 when CLKSEL = high during reset, or MCR[7] is set to 0 after reset
Figure 9 shows the internal prescaler and baud rate generator circuitry.
XTAL1
XTAL2
Internal
Oscillator
Logic
Prescaler Logic
(Divide By 1)
Input Clock
Prescaler Logic
(Divide By 4)
MCR[7] = 0
Reference
Clock
Bandrate
Generator
Logic
MCR[7] = 1
Internal
Bandrate Clock
For Transmitter
and Receiver
Figure 9. Prescaler and Baud Rate Generator Block Diagram
DLL and DLH must be written to in order to program the baud rate. DLL and DLH are the least significant and
most significant byte of the baud rate divisor. If DLL and DLH are both zero, the UART is effectively disabled, as
no baud clock is generated. The programmable baud rate generator is provided to select both the transmit and
receive clock rates. Table 5 and Table 6 show the baud rate and divisor correlation for the crystal with frequency
1.8432 MHz and 3.072 MHz, respectively.
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TL16C752C
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