M16C6NL Datasheet, PDF (384/388 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

REVISION HISTORY
M16C/6N Group (M16C/6NL, M16C/6NN) Hardware Manual
Rev. Date
2.00 Nov. 28, 2005
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Description
Summary
Figure 17.1 D/A Convertoer Block Diagram is revised.
Figure 17.2 DA0 and DA1 Registers: Setting Range is added.
Figure 17.3 D/A Converter Equivalent Circuit: NOTE 2 is added.
Figure 18.3 CRC Calculation is partly revised.
Figure 19.12 C0TECR Register (2nd register): NOTE 1 is added.
19.15.1 Reception: (5) is partly revised.
20. Programmable I/O Ports
• 8th line (Each pin functions ...) is partly revised.
• Last sentence (When using ...) is added.
20.1 PDi Register
• 4 th line: The sentence (During memory expansion ...) is added.
20.2 Pi Register
• 9 th line: The sentence (During memory expansion ...) is added.
20.3 PURj Register
• 5 th line: The sentence (However, the pull-up ...) is added.
Figure20.7 PD0 to PD13 Registers: NOTE 2 is added.
Figure20.8 Pi Registers (upper): NOTE 2 is added.
Figure20.9 PUR0 Register (upper): NOTE 1 is added.
Figure20.9 PUR1 Register (middle): NOTES 1 to 3 are added.
Table 20.3 Unassigned Pin Handling in Memory Expansion Mode and Microprocessor
Mode is added.
Figure 20.12 Unassigned Pins Handling
• Figure of memory expansion mode ormicroprocessor mode is added.
• NOTE 1 is added.
Table 21.2 Flash Memory Rewrite Modes Overview
• Operation Mode of CPU Rewrite Mode is revised.
• NOTE 2 is revised.
21.1 Memory Map: 2nd sentence (The user ROM ...) is revised.
Figure 21.2 ROMCP Register is revised.
Table 21.3 EW0 Mode and EW1 Mode
• Flash Memory Status Detection of EW0 Mode is revised.
• NOTES 1and 2 are revised.
21.3.2 EW1 Mode: Last sentence (When an erase/program ...) is added.
21.3.3.4 FMSTP Bit
• 8th line: Procedure to change the FMSTP bit setting (1) to (4) are added.
Figure 21.5 Setting and Resetting of EW0 Mode
• First frame: “memory expansion mode” is added.
• NOTE 5 is revised.
Figure 21.6 Setting and Resetting of EW1 Mode: NOTE 1 is revised.
Figure 21.7 Processing Before and After Low Power Dissipation Mode or On-chipOscillator
Low Power Dissipation Mode:
• Title, First and second frames (left) and top of right: “on-chip oscillator low power
dissipation mode” is addded.
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