M16C6NL Datasheet, PDF (258/388 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

Under development
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M16C/6N Group (M16C/6NL, M16C/6NN)
19. CAN Module
19.16 CAN Interrupt
The CAN module provides the following CAN interrupts.
• CAN0 Successful Reception Interrupt
• CAN0 Successful Transmission Interrupt
• CAN0 Error Interrupt: Error Passive State
Error BusOff State
Bus Error (this feature can be disabled separately)
• CAN0 Wake-up Interrupt
When the CPU detects the CAN0 successful reception/transmission interrupt request, the MBOX bit in the
C0STR register must be read to determine which slot has generated the interrupt request.
Rev.2.00 Nov 28, 2005 page 242 of 364
REJ09B0126-0200