M16C6NL Datasheet, PDF (382/388 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

REVISION HISTORY
M16C/6N Group (M16C/6NL, M16C/6NN) Hardware Manual
Rev. Date
Page
Description
Summary
1.02 Jul. 01, 2005 269 Table 21.4 Electrical Characteristics (1)
• Measuring Condition of VOL is revised from “LOL = –200µA” to “LOL = 200µA”.
270 Table 21.5 Electrical Characteristics (2): Mask ROM (5th item)
• “f(XCIN)” is changed to “(f(BCLK)).
271 Table 21.6 A/D Conversion Characteristics: “Tolerance Level Impedance” is deleted.
304 22.14 Programmable I/O Ports: last 1 to 2 lines
• (1) Setting Procedure is revised from “#00010000b” to “#00000001b”.
• (2) Setting Procedure is revised from “#00010011b” to “#00110001b”.
2.00 Nov. 28, 2005 – Revised edition issued
* Memory expansion and microprocessor modes are added.
* Revised parts and revised contents are as follows (except for expressional change).
2 Table 1.1 Performance Outline (100-pin version): Operation Mode is revised.
3 Table 1.2 Performance Outline (128-pin version): Operation Mode is revised.
5 Table 1.3 Product List: NOTE 1 is added.
6 Figure 1.3 Pin Configuration (1): Bus control pins are added.
7, 8 Tables 1.4 and 1.5 Pin Characteristics in 100-pin version (1)(2) are added.
9 Figure 1.4 Pin Configuration (2): Bus control pins are added.
10 to 12 Tables 1.6 to 1.8 Pin Characteristics in 128-pin version (1)(2)(3) are added.
13 to 15 Tables 1.8 to 1.10 Pin Description (1)(2)(3) are revised.
18 3. Memory: Last sentence (In memory expansion ...) is added.
Figure 3.1 Memory Map: NOTES 1 and 2 are added.
19 Table 4.1 SFR Information (1)
• Value of After Reset in PM0 is revised.
• CSR Register is added to 0008h.
• CSE Register is added to 001Bh.
• NOTE 1 is added.
30 Table 4.12 SFR Information (12)
• Value of After Reset in PUR1 is revised.
• NOTE 1 is added.
31 to 33 5. Reset: Layout is changed.
32 Figure 5.2 Reset Sequence is revised.
32 Table 5.1 Pin Status When RESET Pin Level is “L” is revised.
33 5.2 Software Reset, 5.3 Watchdog Timer Reset, 5.4 Oscillation Stop Detection Reset:
Last sentence (Processor mode remains ...) is added to each section.
33 5.5 Internal Space is added.
34 6.1 Types Processor Mode and 6.2 Setting Processor Mode are added.
Table 6.1 Features of Processor Modes, Table 6.2 Processor Mode After Hardware
Reset and Table 6.3 PM01 to PM00 Bits Set Values and Processor Modes are added.
35 Figure 6.1 PM0 Register is revised.
36 Figure 6.2 PM1 Register is revised.
_____
38, 39 Figures 6.4 to 6.7 Memory Map and CS Area in Memory Expansion Mode and Microprocessor
Mode (1) to (4) are added.
40 to 50 7. Bus is added.
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