HD404019R Datasheet, PDF (30/65 Pages) Renesas Technology Corp – CMOS 4-bit single-chip microcomputers

HD404019R Series
Input/Output
The MCU has 58 I/O pins, 32 standard and 26 high voltage. One of three circuit types can be selected by
the mask option for each standard pin: CMOS, with pull-up MOS, and without pull-up MOS (NMOS open
drain); and one of two circuit types can be selected for each high-voltage pin: with pull-down MOS and
without pull-down MOS (PMOS open drain). Since the pull-down MOS is connected to the internal V_disp
line, the RA₁/V_disp pin must be selected as V_disp via the mask option when the option with pull-down MOS is
selected for at least one high-voltage pin. See table 17 for I/O pin circuit types.
When every input/output pin is used as an input pin, the mask option and output data must be selected in
the manner specified in table 18.
Output Circuit Operation of With Pull-Up MOS Standard Pins: In the standard pin option with pull-up
MOS, the circuit shown in figure 15 is used to shorten the rise time of the output.
When the MCU executes an output instruction, it generates a write pulse to the R port addressed by this
instruction. This pulse will switch the PMOS (B) on and shorten the rise time. The write pulse keeps the
PMOS in the on state for one-eighth of the instruction cycle time. While the write pulse is 0, a high output
level is maintained by the pull-up MOS (C).
When the HLT signal becomes 0 in the stop mode, MOS (A), (B), and (C) turn off.
D Port: I/O port D has 16 discrete I/O pins, each of which can be addressed independently. It can be
set/reset through the SED/RED and SEDD/REDD instructions, and can be tested through the TD and TDD
instructions. See tables 17 and 18 for the classification of standard pin, high-voltage pin, and the I/O pin
circuit types.
R Ports: The eleven R ports are composed of 36 I/O pins and 6 input-only pins. Data is input through the
LAR and LBR instructions and output through the LRA and LRB instructions. The MCU will not be
affected by writing into the input-only and/or non-existing ports, while invalid data will be read when the
output-only and/or non-existing ports are read.
The R3 ₂, R3₃, R4₀, R4 ₁, and R4₂ pins are multiplexed with the INT₀, INT₁, SCK, SI, and SO pins,
respectively. See tables 17 and 18 for the classification of standard pins, high-voltage pins and selectable
circuit types of these I/O pins.
Unused I/O Pins: If unused I/O pins are left floating, the LSI may malfunction because of noise. The I/O
pins should be fixed as follows to prevent malfunction.
High-voltage pins: Select without pull-down MOS (PMOS open drain) via the mask option and connect to
V_CC on the printed circuit board.
Standard pins: Select without pull-up MOS (NMOS open drain) via the mask option and connect to GND
on the printed circuit board.
R4₀/SCK and R4₂/SO should be used as R4₀ and R4₂ by the serial mode register and port mode register,
respectively.
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