English
Language : 

HD404019R Datasheet, PDF (10/65 Pages) Renesas Technology Corp – CMOS 4-bit single-chip microcomputers
HD404019R Series
RAM Memory Map
The MCU also contains a 992-digit × 4-bit RAM as the data and stack area. In addition to these areas,
interrupt control bits and special function registers are also mapped on the RAM memory space. The RAM
memory map (figure 2) is described in the following paragraphs.
Interrupt Control Bits Area ($000 to $003): The interrupt control bits area (figure 3) is used for interrupt
control. It is accessible only by RAM bit manipulation instructions. However, the interrupt request flag
cannot be set by software. The RSP bit is used only to reset the stack pointer.
Special Function Registers Area ($004 to $00B): The special function registers are the mode or data
registers for the external interrupt, the serial interface, and the timer/counters. These registers are classified
into three types: write-only, read-only, and read/write as shown in figure 2. These registers cannot be
accessed by RAM bit manipulation instructions.
Data Area ($020 to $3BF): The 16 digits, $020 through $02F, of the data area are called memory registers
(MR) and are accessible by the LAMR and XMRA instructions (figure 4).
Stack Area ($3C0 to $3FF): Locations $3C0 through $3FF are reserved for LIFO stacks to save the
contents of the program counter (PC), status flag (ST), and carry flag (CA) when subroutine calls (CAL
instruction, CALL instruction) or interrupts are processed. This area can be used as a 16-level nesting stack
in which one level requires 4 digits. Figure 4 shows the save condition. The program counter is restored by
the RTN and RTNI instructions. The status and carry flags are restored only by the RTNI instruction. This
area, when not used as a stack, is available as a data area.
8