HD404019R Datasheet, PDF (27/65 Pages) Renesas Technology Corp – CMOS 4-bit single-chip microcomputers

HD404019R Series
Timer B is initialized according to the data written into timer load register B by software. Timer B counts
up at every clock input signal. When the next clock signal is applied to timer B after it is set to $FF, it will
generate an overflow output. In this case, if the autoreload function is selected, timer B is initialized
according to the value of timer load register B. If it is not selected, timer B goes to $00. The timer B
interrupt request flag (IFTB: $002, bit 0) will be set at this overflow output.
Timer Mode Register A (TMA: $008): Timer mode register A is a 3-bit write-only register. The TMA
controls the prescaler divide ratio of timer A clock input as shown in table 11. Timer mode register A is
initialized to $0 by MCU reset.
Table 11 Timer Mode Register A
TMA2
0
1
TMA1
0
1
0
1
TMA0
0
1
0
1
0
1
0
1
Prescaler Divide Ratio
÷ 2048
÷ 1024
÷ 512
÷ 128
÷ 32
÷8
÷4
÷2
Timer Mode Register B (TMB: $009): Timer mode register B (TMB) is a 4-bit write-only register which
selects the auto-reload function, the prescaler divide ratio, and the source of the clock input signal, as
shown in table 12. Timer mode register B is initialized to $0 by MCU reset.
The operation mode of timer B changes at the second instruction cycle after timer mode register B is
written to. Timer B should be initialized by writing data into timer load register B after the contents of
TMB are changed. The configuration and function of timer mode register B is shown in figure 14.
Table 12 Timer Mode Register B
TMB3
0
1
Auto-Reload Function
No
Yes
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