HD404019R Datasheet, PDF (15/65 Pages) Renesas Technology Corp – CMOS 4-bit single-chip microcomputers

HD404019R Series
Interrupts
Five interrupt sources are available on the MCU: external requests (INT₀, INT₁), timer/counters (timers A
and B), and serial port (serial). For each source, an interrupt request flag (IF) interrupt mask (IM), and
interrupt vector addresses control and maintain the interrupt request. The interrupt enable flag (IE) also
controls interrupt operations.
Interrupt Control Bits and Interrupt Processing: The interrupt control bits are mapped on $000 through
$003 of the RAM space. They are accessible by RAM bit manipulation instructions. (The interrupt request
flag (IF) cannot be set by software.) The interrupt enable flag (IE) and IF are cleared to 0, and the interrupt
mask (IM) is set to 1 by MCU reset.
Figure 6 is a block diagram of the interrupt control circuit. Table 1 shows the interrupt priority and vector
addresses, and table 2 shows the interrupt conditions corresponding to each interrupt source.
An interrupt request is generated when IF is set to 1 and IM is 0. If IE is 1 at this time, the interrupt will be
activated and vector addresses will be generated from the priority PLA corresponding to the interrupt
source.
Table 1 Vector Addresses and Interrupt Priority
Reset/Interrupt
RESET
INT₀
INT₁
Timer A
Timer B
Serial
Priority
—
1
2
3
4
5
Vector Addresses
$0000
$0002
$0004
$0006
$0008
$000C
Table 2 Interrupt Conditions
Interrupt Control Bit
IE
IF0 · IM0
IF1 · IM1
IFTA · IMTA
IFTB · IMTB
IFS · IMS
Note: * Indicates don’t care
Interrupt Source
INT₀
1
INT₁
1
1
0
*
1
*
*
*
*
*
*
Timer A
1
0
0
1
*
*
Timer B
1
0
0
0
1
*
Serial
1
0
0
0
0
1
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